CCD structures with surface potential asymmetry beneath the phas

Details CCD structures with surface potential asymmetry beneath the phas CCD structures with surface potential asymmetry beneath the phas

1977-11-04

1979-09-04

Larkins, William D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

357 59, 357 91, 307221D, H01L 2978, H01L 2904, G11C 1928

Patent

active

041670175

ABSTRACT:
Processes for manufacturing two-phase charge coupled devices (CCDs) having marginally overlapping phase electrodes and utilizing a single insulating material. Offset self-alignment techniques are used to achieve accurate location of ion implanted potential well or potential barrier regions to achieve the required asymmetry of potential wells (or threshold voltages) in each gate region of the CCD with small bit or charge storage element sizes leading to structures having a high packing density. Fabrication of surface and buried channel structures is described.

REFERENCES:
patent: 3789267 (1974-01-01), Krambeck et al.
patent: 3852799 (1974-12-01), Walden
patent: 3853634 (1974-10-01), Amelio et al.
patent: 3908262 (1975-09-01), Stein
patent: 3911560 (1975-10-01), Amelio et al.
patent: 3914857 (1975-10-01), Goser et al.
patent: 3924319 (1975-12-01), Mohsen
patent: 3927468 (1975-12-01), Anthony et al.
patent: 3931674 (1976-01-01), Amelio
patent: 3967306 (1976-06-01), Bower

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