CCD Delay line system for translating an analog signal

Details CCD Delay line system for translating an analog signal CCD Delay line system for translating an analog signal

1982-11-05

1985-03-19

Murray, Richard

Facsimile and static presentation processing

Static presentation processing

Attribute control

H04N 9535

Patent

active

045062889

ABSTRACT:
The use of a return-to-zero (RZ) sample and hold circuit between the CCD delay line circuit and the low-pass filter of the analog signal translation system provides a steeper high-frequency roll-off of the output from the low-pass filter than does a non-return-to-zero (NRZ) sample and hold circuit, and, therefore, produces less attenuation of high-frequency components of analog signal, such as the color-carrier of an NTSC color television signal.

REFERENCES:
patent: 3474260 (1969-10-01), Frohbach
patent: 3737683 (1973-06-01), Sangster
patent: 3939364 (1976-02-01), Adam et al.
patent: 3999171 (1976-12-01), Parsons
patent: 4096516 (1978-06-01), Pritchard
patent: 4134029 (1979-01-01), Bright et al.

Affiliated with

Also associated with

Rating

CCD Delay line system for translating an analog signal does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with CCD Delay line system for translating an analog signal, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and CCD Delay line system for translating an analog signal will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-755964