CBiCMOS fabrication method using sacrificial gate poly

Details CBiCMOS fabrication method using sacrificial gate poly CBiCMOS fabrication method using sacrificial gate poly

1992-10-30

1995-04-18

Thomas, Tom

Fishing, trapping, and vermin destroying

437 34, 437 59, 437162, 148DIG9, H01L 21265

Patent

active

054078415

ABSTRACT:
A complementary bipolar CMOS fabrication method uses a common deposition for both the CMOS gate contacts, and as a sacrificial layer for patterning bipolar devices. The deposition is removed from the bipolar devices and, after implanting base and emitter regions, is replaced with a separate emitter contact. Prior to its removal the sacrificial layer is coated with an oxidation resistant layer that imparts a desirable rounded shape to the edge of a thermal oxide layer that is grown around the bipolar emitter area. Common mask and implant steps are also used to fabricate lightly doped CMOS drains together with bipolar base-link regions, and CMOS source/drain regions together with bipolar external base regions. The fabrication technique also facilitates the fabrication of capacitors with no additional steps required, and includes an improved NiCr resistor contact method.

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