Cascoded circuit

Details Cascoded circuit Cascoded circuit

2008-10-02

2010-12-07

Choe, Henry K (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including plural stages cascaded

C330S310000

Reexamination Certificate

active

07847638

ABSTRACT:
A cascoded current-mirror circuit includes a first N channel MOS transistor, a second N channel MOS transistor, a third N channel MOS transistor and a fourth N channel MOS transistor. The first N channel MOS transistor and the second N channel MOS transistor are cascode-connected between a higher voltage source and a lower voltage source. The third N channel MOS transistor and the fourth N channel MOS transistor are cascode-connected between the higher voltage source and the lower voltage source. A drain of the first N channel MOS transistor is connected to gates of the first N channel MOS transistor, the second N channel MOS transistor, the third N channel MOS transistor and the fourth N channel MOS transistor. The threshold voltages of the second N channel MOS transistor and the fourth N channel MOS transistor are larger than those of the first N channel MOS transistor and the third N channel MOS transistor.

REFERENCES:
patent: 6316989 (2001-11-01), Kurooka
patent: 6498533 (2002-12-01), Sowlati
patent: 6803824 (2004-10-01), Rategh et al.
patent: 7629853 (2009-12-01), Oishi
patent: 2007/0075784 (2007-04-01), Pettersson et al.
patent: 2001-156558 (2001-06-01), None
Ryuichi Fujimoto et al., “A 7-GHz 1.8-dB NF CMOS Low-Noise Amplifier”, IEEE Journal of Solid-State Circuits, vol. 37, No. 7, Jul. 2002, pp. 852-856.

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