Cascaded two-stage computational SIMD engine having multi-port m

Details Cascaded two-stage computational SIMD engine having multi-port m Cascaded two-stage computational SIMD engine having multi-port m

1996-03-06

1997-09-16

Donaghue, Larry D.

Boots, shoes, and leggings

395379, 395562, 395563, 395586, 364714, 364724011, G06F 738

Patent

active

056690100

ABSTRACT:
A two-stage cascaded processor engine for Digital Signal Processing (DSP) utilizing parallel multi-port memories and a plurality of arithmetic units, including adders and multiplier-accumulators (MACs) is described. The engine supports a Single Instruction Multiple Data (SIMD) architecture. Conventional cascaded processors implementing an add-multiply-accumulate-add process for Short Length Transforms have significant limitations which are removed by the invention. The two stage processor uses two multiport memories. Arithmetic units (AU) in the top stage get their operands from a top multiport RAM and arithmetic units in the bottom stage get their operands from a bottom multiport RAM. AU outputs are stored back into the same stage as multiport RAM and passed either to the next stage or the output bus. The AU outputs can be both stored back into the same stages multiport RAM or passed either to the next stage or output multiplexer, or both of the previous. The system includes and input and output bus thus allowing simultaneous input and output operations. The AUs can also get upper ends from an auxiliary input buses to allow for operations on special data such as constant coefficients with elementary subroutines. The multiple two stage processors operate in an SIMD configuration, each processor receiving the same microcoded instruction from a microstore via a microinstruction bus. Various embodiments are described.

REFERENCES:
patent: 4841467 (1989-06-01), Ho et al.
patent: 5128888 (1992-07-01), Tamura et al.
Bioastronomy --The Next Steps, Artificial Signal Detectors, 1988 by Linscott et al.
VLSI Processors for Signal Decection in SETI, 1986 by Duluk et al.
Artificial Signal Decectors, 1987 by Linscott et al.
The MCSA II --A Broadband, High Resolution, 60 Mchannel Spectrometer, Linscott et al.

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