Cascaded phase-locked loops

Details Cascaded phase-locked loops Cascaded phase-locked loops

2005-01-11

2005-01-11

Nguyen, Linh My (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S156000

Reexamination Certificate

active

06842056

ABSTRACT:
A method and apparatus for generating clock frequencies using cascaded phase-locked loop (PLL) circuits includes a first PLL circuit coupled to a second PLL circuit to produce a microprocessor I/O data clock signal and a microprocessor core clock signal, respectively. In one embodiment, the first PLL produces the data clock signal based upon a first reference signal and a first feedback signal, where the first feedback signal is derived from the data clock signal. Furthermore, the second PLL circuit produces the core clock signal based at least in part upon a second reference signal and a second feedback signal, where the second reference signal is derived from the data clock signal and the second feedback signal is derived from the core clock signal.

REFERENCES:
patent: 4577241 (1986-03-01), Wilkinson
patent: 6112308 (2000-08-01), Self et al.
patent: 6218876 (2001-04-01), Sung et al.
patent: 6320424 (2001-11-01), Kurd et al.
patent: 6329882 (2001-12-01), Fayneh et al.
patent: 6433599 (2002-08-01), Friedrich et al.
patent: 6636575 (2003-10-01), Ott
N. Kurd, et al., “Multi-GHz Clocking Scheme for Intel Pentium 4 Microprocessor,” ISSCC Digest of Technical Papers, 2001.
S. Rusu, et al., “Clock Generation and Distribution for the First IA-64 Microprocessor,” ISSCC Disgest of Technical Papers, 2000.
R. Kuppuswamy, et al., “On-die Clock Jitter Detector for High-speed Microprocessors,” VLSI Symposium Digest of Technical Papers, 2001.
J. Maneatis, “Low-Jitter Process-Independent DLL and PLL Based on Self-Biased Techniques,” IEEE J. Solid-State Circuits, vol. 31, No. 11, pp. 1723-1732, Nov. 1996.

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