Cascaded parallel phase locked loops

Details Cascaded parallel phase locked loops Cascaded parallel phase locked loops

2005-04-05

2005-04-05

Ton, Dang (Department: 2666)

Multiplex communications

Pathfinding or routing

Through a circuit switch

Reexamination Certificate

active

06876651

ABSTRACT:
A parallel cascaded set of transceivers using phase locked loops comprises a PCM communication link therebetween. At a first transceiver station, a primary framer receives an incoming signal. The primary framer extracts a payload signal and a clock signal and splits both. One clock signal is directed to the phase locked loop and the other clock signal is directed to a downstream transceiver. In this manner, start up delay and error introduction are reduced.

REFERENCES:
patent: 5696800 (1997-12-01), Berger
patent: 6317008 (2001-11-01), Gabara

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