Cascaded biquad infinite impulse response filter

Details Cascaded biquad infinite impulse response filter Cascaded biquad infinite impulse response filter

2005-01-18

2005-01-18

Phu, Phuong (Department: 2631)

Pulse or digital communications

Receivers

Interference or noise reduction

C375S232000, C708S320000

Reexamination Certificate

active

06845135

ABSTRACT:
An improved cascaded biquad infinite impulse response (IIR) filter structure is provided. The IIR filter of the invention may be implemented in a digital signal processor (DSP) such as a very long instruction word (VLIW) type DSP, as well as other processing circuitry, e.g., an integrated circuit. The new filter structure, among other advantages, overcomes the bottleneck condition known to occur in the updating operation of the w2(n−1) state of a conventional cascaded biquad IIR filter. In one illustrative implementation of the invention, this is accomplished by adding a single 32-bit intermediate state thus providing a cascaded biquad IIR filter structure such that the w2(n−1) state may be updated one clock cycle earlier. Thus, in a StarCore SC140 DSP example where a corresponding conventional cascaded biquad IIR filter structure executes at seven cycles per input sample, the improved cascaded biquad IIR filter structure of the present invention executes at six cycles per input sample. Therefore, without losing any precision, the kernel cycle count associated with the improved cascaded biquad IIR filter structure is advantageously reduced by 14 percent. Such a reduction in kernel count translates to a proportional increase in the processing speed of the DSP or other processing circuitry with which it is implemented.

REFERENCES:
patent: 4521867 (1985-06-01), Kasuga
patent: 6263354 (2001-07-01), Gandhi
patent: 6445735 (2002-09-01), Whikehart

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