Cascade type CMOS semiconductor device

Electrical transmission or interconnection systems – Personnel safety or limit control features – Interlock

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Details

307269, 307270, 307296A, 357 42, 368219, H03K 3354, H01L 2704, G04C 1000

Patent

active

043743323

ABSTRACT:
Within a semiconductor device having two sets of CMOS inverters, the two sets of CMOS inverters are electrically connected in series to a power source for supplying electric power to the semiconductor device. The two sets of CMOS inverters are formed in an oscillating circuit for producing a time base signal and a frequency dividing circuit, respectively. Device operating current and power consumption are accordingly reduced.

REFERENCES:
patent: 3828547 (1974-08-01), Fujita
patent: 4013901 (1977-03-01), Williams
patent: 4024418 (1977-05-01), Hankel
patent: 4094137 (1978-06-01), Morokawa
patent: 4229668 (1980-10-01), Ebihara et al.

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