Static information storage and retrieval – Addressing – Plural blocks or banks
Patent
1998-02-05
1999-10-05
Hoang, Huan
Static information storage and retrieval
Addressing
Plural blocks or banks
365 49, 36518905, G11C 800
Patent
active
059634995
ABSTRACT:
A memory array comprising a plurality of storage elements and a logic circuit. The memory array may be configured to (i) receive a plurality of input data streams, (ii) store each of the plurality of input data streams in one or more of the storage elements in response to a plurality of control signals and (iii) present a plurality of output data streams in response to the plurality of input data streams. The logic circuit may present the plurality of control signals in response to the fullness of each of the plurality of storage elements.
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Arcoleo Mathew R.
Johnson Derek
Leong Raymond M.
Cypress Semiconductor Corp.
Hoang Huan
Maiorana P.C. Christopher P.
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