CAS recognition in burst extended data out DRAM

Details CAS recognition in burst extended data out DRAM CAS recognition in burst extended data out DRAM

1995-11-06

1997-10-28

Nelms, David C.

Static information storage and retrieval

Addressing

Sync/clocking

365236, 3652385, 365239, 365235, G11C 800

Patent

active

056823541

ABSTRACT:
An integrated memory circuit is described which can be operated in a burst access mode. The memory circuit includes an address counter which changes column addresses in one of a number of predetermined patterns. The memory includes generator circuit for generating an internal control signal based upon external column address signals. The generator circuit detects the first active transition of the column address signals and the first inactive transition of the column address signals.

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