Carry skip-ahead circuit for Manchester-type adder chain

Details Carry skip-ahead circuit for Manchester-type adder chain Carry skip-ahead circuit for Manchester-type adder chain

1986-07-09

1989-05-02

Harkcom, Gary V.

Boots, shoes, and leggings

G05F 750

Patent

active

048274445

ABSTRACT:
A bypass circuit (20) opens transmission gates (13) through (16) when the condition is satisfied that two bit values Ai and Bi (i=0, 1, . . . n) to each full adder (1) are non-coincident with each other throughout the full adders. To this end, the inverse of the initial carry signal C.sub.0 is outputted as the addition results S.sub.0 and S.sub.n and the initial carry signal C.sub.0 is outputted as the final stage output signal C.sub.n.

REFERENCES:
patent: 3728532 (1973-04-01), Pryor
"New Scheme for VLSI Implementation of Fast ALV", IBM Technical Disclosure Bulletin, vol. 28, No. 3, Aug. 1985, pp. 1277-1282.
"Introduction to VLSI System", Carver Mead & Lynn Conway, pp. 22, 23, 150 & 151, Oct. 1980.

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