Carry-select adder

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G06F 750

Patent

active

050273124

ABSTRACT:
A carry-select adder composed of blocks, each containing an input adder cell and a number of adder cells of a first and second type. Each block has one input adder cell interconnected to adder cells of the first and second type which are connected in an alternating fashion. The cells are connected to each other via carry lines and block carry lines. The adder cells of the first and second type each have a gate arrangement which utilizes field effect transistors for transfer, pull-up and pull-down transistors. These transistors are not a component part of a combination gate within an adder cell. The gate arrangement significantly increases the processing speed of the carry-select adder.

REFERENCES:
patent: 3100835 (1963-08-01), Bedrij
patent: 4573137 (1986-02-01), Ohhashi
patent: 4623982 (1986-11-01), Ware
patent: 4682303 (1987-07-01), Uya
patent: 4704701 (1987-11-01), Mazin et al.

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