Carry-look-ahead adder including bipolar and MOS transistors

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G06F 750

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active

047899581

ABSTRACT:
A carry-look-ahead adder is provided which is implemented as a semiconductor integrated circuit. The integrated circuit includes a bipolar transistor coupled to the output terminal for providing an output indicative of the arithmetic operation. Impedance elements are coupled to the bipolar transistor and at least one FET is provided to control the on/off state of the bipolar transistor.

REFERENCES:
patent: 3728532 (1973-04-01), Pryor
patent: 4229803 (1980-10-01), Rhodes
patent: 4234803 (1980-11-01), Nonaka
patent: 4255671 (1981-03-01), Nonaka et al.
patent: 4425623 (1984-01-01), Russell
patent: 4504924 (1985-03-01), Cook et al.
Horowitz et al, The Art of Electronics, Cambridge University Press, 1980, pp. 229-230 and 240.
Nosowicz et al, "High-Speed Look-Ahead Carry", IBM Tech. Disclosure Bulletin, vol. 20, No. 12, May 1978, pp. 5150-5151.
Slager et al, "A 16b Microprocessor with On-Chip Memory Protection", ISSCC 83, Feb. 23, 1983, pp. 24-25.
Mor et al, "A 16b Microprocessor for Realtime Applications", ISSCC 83, Feb. 23, 1983, pp. 28-29.

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