Carry-bypass arithmetic logic unit

Details Carry-bypass arithmetic logic unit Carry-bypass arithmetic logic unit

1985-08-02

1988-08-16

Harkcom, Gary V.

Boots, shoes, and leggings

G06F 750

Patent

active

047648872

ABSTRACT:
An arithmetic logic circuit comprising a plurality of cells of conventional logic circuits for performing logical and arithmetic operations in combination with a kill circuit in each one of the cells which is responsive to bits of first and second operands T and B, a clock signal .0.1*, a propagate bit P and a carry-in bit C.sub.in for selectively providing a carry-out bit C.sub.out and/or a carry-bypass circuit coupled to each one of a plurality of sets of cells which is responsive to propagate bits P from said cells in each set, a clock signal .0.2* and a carry-in bit C.sub.in for allowing said carry-in bit C.sub.in to bypass selected ones of the cells.

REFERENCES:
patent: 3925651 (1975-12-01), Miller
patent: 3925652 (1975-12-01), Miller
patent: 3987291 (1986-10-01), Gooding et al.
patent: 4559608 (1985-12-01), Young et al.
patent: 4584661 (1986-04-01), Grindland
patent: 4638300 (1987-01-01), Miller

Affiliated with

Also associated with

Rating

Carry-bypass arithmetic logic unit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Carry-bypass arithmetic logic unit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Carry-bypass arithmetic logic unit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-604336