Carry anticipator circuit and method

Details Carry anticipator circuit and method Carry anticipator circuit and method

1978-09-05

1980-05-13

Malzahn, David H.

Boots, shoes, and leggings

G06F 750

Patent

active

042031575

ABSTRACT:
A circuit and a method for adding an 8-bit operand to a 16-bit operand are disclosed such that the number of machine cycles required by a data processor to perform such an addition is reduced. The 8-bit operand and the least significant byte of the 16-bit operand are added together within an 8-bit adder circuit to generate the least significant byte of the result. Simultaneously, the most significant byte of the 16-bit operand is stored in a temporary register and is also input to an increment/decrement network. The adder circuit, after a given delay time, generates a carry signal depending on whether a carry-out was produced by the addition. The carry signal and the sign bit of the 8-bit operand control the mode of operation of the increment/decrement network and determine whether the increment/decrement network or the temporary register will be selected to provide the most significant byte of the result.

REFERENCES:
patent: 3100835 (1963-08-01), Bedrij
patent: 3100836 (1963-08-01), Paul et al.
patent: 3316393 (1967-04-01), Ruthazer
Hallin et al., "Pipelining of Arithmetic Functions", IEEE Trans. on Computers, Aug. 1972, pp. 880-886.

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