Pulse or digital communications – Receivers – Angle modulation
Reexamination Certificate
1999-12-01
2004-02-17
Vo, Don N. (Department: 2631)
Pulse or digital communications
Receivers
Angle modulation
C375S329000
Reexamination Certificate
active
06693978
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a carrier reproducing circuit to be used with a radio receiver or the like of a digital modulation type, and more particularly to a carrier reproducing circuit for reproducing a carrier from a received phase shift keying modulation signal.
BACKGROUND OF THE INVENTION
In this specification, a term “scanning” is used as having the meaning of “frequency sweep” for the reproduction of a demodulation carrier, and a term “scanning frequency width” is used as having the meaning of “a range of the center frequency of a received signal to be covered by a radio receiver.” For example, the scanning frequency width of a digital satellite radio receiver is about 1.5 MHz.
In a satellite radio receiver, a carrier is scanned after the power is turned on. When a frame synchronization signal is received during the scanning operation, it is judged that the reception state is in a frame synchronization state, and the scanning operation is stopped and a carrier tracking state enters to use the carrier as a reproduction carrier.
The structures of conventional carrier reproducing circuits are shown in
FIGS. 5
to
7
. A conventional carrier reproducing circuit shown in
FIG. 5
will be described. In the carrier reproducing circuit shown in
FIG. 5
, a reception wave modulated by phase shift keying is frequency-converted into a predetermined intermediate frequency and input to a quadrature detecting circuit
1
A. The quadrature detecting circuit
1
A receives a demodulation carrier output from a voltage controlled oscillator (hereinafter described as VCO where applicable) and the demodulation carrier shifted by 90 degrees by a 90° phase shift circuit
121
. The quadrature detecting circuit
1
A detects baseband signals of I and Q axes from the reception signal converted into the intermediate frequency.
The baseband signals of I and Q axes are supplied to A/D converters
2
and
3
and converted into discrete digital signals whose frequency bands are limited by digital filters
8
and
9
. The band-limited baseband signals DI and DQ are supplied to a phase error detecting circuit
122
and to a parallel/serial converter circuit
123
. The parallel/serial converter circuit
123
converts the baseband signals DI and DQ into serial data and outputs the serial data.
The phase error detecting circuit
122
detects a phase error from the received baseband signals DI and DQ. A phase error monitor circuit
124
checks whether phase error data corresponding to the detected phase error remains in a steady state, and if in the steady state, outputs a SYNC signal to an AFC circuit
125
to thereby confirm the carrier synchronization.
Until the SYNC signal is supplied to the AFC circuit
125
, the AFC circuit
125
continues to output a scanning signal to an adder
126
which adds the scanning signal to the phase error data. The adder
126
supplies the addition output to a D/A converter
127
which converts the addition output into an analog signal which is supplied to a loop filter
128
and smoothed. An output voltage of the loop filter
128
is supplied as a voltage control signal to the voltage controlled oscillator
120
to control the oscillation frequency and scan the carrier. When the AFC circuit
125
receives the SYNC signal, it stops outputting the scanning signal to confirm the carrier synchronization and enter the tracking state dependent upon the phase error data to reproduce the carrier.
In the circuit shown in
FIG. 6
, a frame synchronizing circuit
129
is used in place of the parallel/serial converter circuit
123
shown in FIG.
5
. In this example, until the SYNC signal is supplied from the frame synchronization circuit
129
to the AFC circuit
125
, the AFC circuit
125
continues to output the scanning signal to the adder
126
which adds the scanning signal to the phase error data. The adder
126
supplies the addition output to the D/A converter
127
which converts the addition output into an analog signal which is supplied to the loop filter
128
and smoothed.
A smoothed output voltage of the loop filter
128
is supplied as a voltage control signal to the voltage controlled oscillator
120
to control the oscillation frequency and scan the carrier. When the AFC circuit
125
receives the SYNC signal, it stops outputting the scanning signal to confirm the carrier synchronization and enter the tracking state dependent upon the phase error data to reproduce the carrier. These operations are similar to the circuit shown in FIG.
5
.
In the carrier reproducing circuit shown in
FIG. 7
, a quasi-synchronization detecting circuit
1
is used in the carrier reproducing circuit shown in FIG.
6
. In the carrier reproducing circuit shown in
FIG. 7
, a reception wave modulated by phase shift keying is frequency-converted into a predetermined intermediate frequency and input to the quasi-synchronization detecting circuit
1
. The quasi-synchronization detecting circuit
1
detects baseband signals of I and Q axes from the reception signal converted into the intermediate frequency.
An output of the adder
126
is supplied to a digital loop filter
130
. An output of the loop filter
130
is supplied to numerical control oscillators (NCO in
FIG. 7
)
6
and
7
. A multiplier
4
multiplies an oscillation output of the numerical control oscillator
6
by an output of the A/D converter
2
, and a multiplier
5
multiplies an oscillation output of the numerical control oscillator
7
by an output of the A/D converter
3
, to thereby perform quadrature detection. The phase of the oscillation output of the numerical control oscillator
6
is made different by 90° from that of the oscillation output of the numerical control oscillator
7
.
The baseband signals DI and DQ output from the multipliers
4
and
5
are supplied to digital filters
8
and
9
through which the frequency bands of the baseband signals are limited. The band-limited baseband signals are supplied to the phase error detecting circuit
122
and to the frame synchronizing circuit
129
. The frame synchronizing circuit
129
converts the baseband signals DI and DQ into serial data and outputs the serial data.
The phase error detecting circuit
122
detects a phase error from the received baseband signals DI and DQ. Phase error data corresponding to the detected phase error and the scanning output of the AFC circuit
125
are added by the adder
126
. This addition output is supplied to the loop filter
130
. An output of the loop filter
130
is supplied as oscillation frequency control data to the numerical control oscillators
6
and
7
to control the oscillation frequency and perform the scanning operation.
During the scanning operation, if the frame synchronizing circuit
129
detects a repetition of a synchronization pattern at a predetermined period, the synchronization pattern indicating the top field of the frame data in a series of reception data, then it is judged that the reception state is in a frame synchronization state. Therefore, the SYNC signal is supplied to the AFC circuit
125
to thereby confirm the carrier synchronization. When the AFC circuit
125
receives the SYNC signal, it stops outputting the scanning signal to enter the tracking state dependent upon the phase error data to reproduce the carrier.
One of the above-described conventional carrier reproducing circuits is, however, associated with some problems. Namely, although the carrier scanning is stopped in response to the SYNC signal to be output from the phase error monitor circuit, the reliability of carrier synchronization detection is low if a C/N ratio is low.
The others of the above-described conventional carrier reproducing circuits are, however, associated with some problems. Namely, although the carrier scanning is stopped in response to the SYNC signal to be detected by the frame synchronization circuit, it generally takes several tens frames to detect the SYNC signal so that the time taken to detect the carrier synchronization is long. Therefore, the scanning period by AFC is long.
An
Horii Akihiro
Shiraishi Kenichi
Kabushiki Kaisha Kenwood
Robinson Eric J.
Robinson Intellectual Property Law Office P.C.
Vo Don N.
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