Carrier regenerating circuit

Pulse or digital communications – Receivers – Automatic frequency control

Patent

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Details

375326, 375371, 329302, H04L 2706

Patent

active

059870788

ABSTRACT:
A carrier regenerating circuit used for a demodulator which demodulates many-valued orthogonal amplitude modulation signals. The carrier regenerating circuit consists of a first PLL (phase-locked loop) section, including a detector for detecting an intermediate-frequency signal using a local oscillator, a phase error detecting section and a first loop filter, which feeds back phase error information to the local oscillator via the first loop filter; and a second PLL (phase-locked loop) section, including a frequency control section a second loop filter, which feeds back a frequency control signal to the local oscillator via the second loop filter by performing an updating operation by means of the frequency control section when a mark ratio due to the phase error information deviates from a predetermined range. The carrier regenerating circuit with a simplified circuit configuration can always synchronize an input signal (a many-valued orthogonal amplitude-modulation signal) by quickly adjusting the frequency of a regeneration carrier signal to an optimum value even when the input signal is out of synchronization.

REFERENCES:
patent: 5260671 (1993-11-01), Iso et al.
patent: 5579346 (1996-11-01), Kanzaki
patent: 5633898 (1997-05-01), Kishigami et al.
patent: 5661761 (1997-08-01), Iwamatsu

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