Carrier out-of-lock detector apparatus

Pulse or digital communications – Repeaters – Testing

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Details

329 50, 329111, 375 81, 375120, H03D 302

Patent

active

047363860

ABSTRACT:
A logic circuit for detecting when the sign and most significant error bit of the digital values defining the data vector for either the In-phase or quadrature-phase have identical logic values. As illustrated, a pair of counters is used to provide an integrator with one of the counters receiving all error indications and the other receiving "good" indications and an output is provided when one of the counters first reaches a full count condition. Thus, the integrator provides an out-of-lock condition when there is an error indicative condition for more than half of a predetermined number of counts.

REFERENCES:
patent: 4458356 (1984-07-01), Toy
patent: 4466109 (1984-08-01), Sari
patent: 4534036 (1985-08-01), Betts et al.
patent: 4687999 (1987-08-01), Desperben

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