Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Patent
1998-02-09
2000-06-20
Thomas, Tom
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
257737, 257778, 257780, H01L 2348
Patent
active
060781041
ABSTRACT:
A film, on which external electrodes and wire leads are disposed, is divided into two regions. A first region in which an integrated circuit element is disposed and a second region external to the first region. Connection holes are provided in a border area between the first and second regions for connecting the integrated circuit element and electrodes. External electrodes are provided on the first and second regions for connecting to an external substrate. The external electrodes are disposed to form a common matrix. When connecting external electrodes to an external substrate, connections to the external substrate are made in a region corresponding to an integrated circuit element.
REFERENCES:
patent: 5506756 (1996-04-01), Haley
patent: 5777391 (1998-07-01), Nakamura et al.
Japanese Patent Abstract No. 07-249654, Sep. 26, 1995.
Japanese Patent Abstract No. 05-226409, Sep. 3, 1993.
Nadav Ori
Seiko Epson Corporation
Thomas Tom
LandOfFree
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