Carrier conduction conductor-insulator semiconductor (CIS) trans

Details Carrier conduction conductor-insulator semiconductor (CIS) trans Carrier conduction conductor-insulator semiconductor (CIS) trans

1993-12-23

1995-01-17

Loke, Steven Ho Yin

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Bipolar transistor

257198, 257557, 257565, 257616, H01L 31072, H01L 31109, H01L 2900, H01L 27082

Patent

active

053828151

ABSTRACT:
A Conductor Insulator Semiconductor (CIS) heterojunction transistor. The CIS transistor is on silicon (Si) substrate. A layer of n type Si is deposited on the substrate. A trench is formed through the n type Si layer, and may extend slightly into the substrate. The trench is filled with an insulator, preferably SiO.sub.2. A layer of p type Si.sub.1-z Ge.sub.z (where z is the mole fraction of Ge and 0.1.ltoreq.z.ltoreq.0.9) is deposited on the n type Si layer. A p.sup.+ base contact region is defined in the p type Si.sub.1-z Ge.sub.z region above the oxide filled trench. A n type dopant is ion implanted into both the Si.sub.1-z Ge.sub.z and n Si layers and may extend slightly into the substrate, forming a collector region. A thin oxide layer is deposited on the Si.sub.1-z Ge.sub.z layer and a low work function metal such as Al, Mg, Mn, or Ti is selectively deposited on the thin oxide and to define an emitter. Alternatively, the emitter may be p.sup.+ polysilicon. Next, the thin oxide is opened to define collector and base contacts. A suitable metal, such as Al is deposited in the base and collector contacts.

REFERENCES:
patent: 5105250 (1992-04-01), Tam et al.
patent: 5137840 (1992-08-01), Desilets et al.
patent: 5177583 (1993-01-01), Endo et al.
patent: 5198689 (1993-03-01), Fujioka
IEEE Electron Device Letter, vol. EDL-4, No. 7, Jul. 1983, "Super-Gain Silicon MIS Heterojunction Emitter Transistors" by Green et al., pp. 225-227.
J. C. Bean, et al., "Ge.sub.x Si.sub.1-x /Si strained-layer superlattice grown by molecular beam epitaxy" J. Vac. Sci. Technology, A, V. 2, #2, pp. 436-440, Apr.-Jun. 1984.
R. People, et al., "Band alignments of coherently strained Ge.sub.x Si.sub.1-x /Si heterostructures on <001>Ge.sub.y Si.sub.1-y substrates" Appl. Phys. Lett., V. 48, No. 8, p. 538540, Feb. 1986.
S. C. Jain, et al., "Structure, properties and applications of Ge.sub.x Si.sub.1-x stained layers and superlattices" Semiconductor Science Technology, V. 6, pp. 547-576, 1991.

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