Special receptacle or package – Holder for a removable electrical component – Including component positioning means
Reexamination Certificate
2001-05-02
2002-11-05
Luong, Shian (Department: 3728)
Special receptacle or package
Holder for a removable electrical component
Including component positioning means
C206S509000, C206S561000, C206S564000
Reexamination Certificate
active
06474477
ABSTRACT:
CROSS-REFERENCES
None.
FIELD OF THE INVENTION
The present invention relates generally to the manufacture of semiconductor IC packages such as are utilized in different computer electronic circuit applications, and particularly concerns a semiconductor IC package carrier that may be used advantageously in connection with various semiconductor integrated circuit manufacturing and testing operations to obtain increases in operations efficiencies and reductions in operations costs.
BACKGROUND OF THE INVENTION
Known carriers for transporting and processing semiconductor IC packages between and within different manufacturing and testing operations, and particularly those carriers qualifying as JEDEC (Joint Electron Device Engineering Council) standard trays, are unnecessarily restricted to relatively slow lateral movement during manufacturing and testing process operations, are unnecessarily restricted to relatively horizontal carrier orientations because of inadequate individual semiconductor IC package retention, and can also unnecessarily contribute to unwanted semiconductor IC package damage arising out of inadvertent carrier handling accidents. Such limitations lead to relatively low device manufacturing and testing efficiencies and consequential relatively high manufacturing and testing costs. See U.S. Pat. No. 5,794,783 pertaining to a “Die-level Burn-in and Test Flipping Tray” invention, issued May 1, 2001 in the name of Carter, and assigned to Intel Corporation for details of a representative JEDEC-standard general matrix tray which is subject to such shortcomings.
Accordingly it is a principal object of the present invention to provide a semiconductor IC package carrier that, when utilized in connection with various device manufacturing and testing operations, significantly improves processing efficiency and also significantly reduces related manufacturing and testing costs.
Other objects and advantages of the present invention will become apparent during consideration of the detailed descriptions, drawings, and claims which follow.
SUMMARY OF THE INVENTION
The semiconductor IC package carrier assembly of the present invention is basically comprised of a tray component having a deck surface provided with a matrix of multiple integrally-molded package pockets, a separate cover component having a deck with a matrix of multiple integrally-molded package pockets whose positions respectively register with the tray component package pockets when assembled to the tray component, and multiple latch components that are each comprised of a latch cutout receptacle element molded integral with the assembly tray component and of a snap latch element that is molded integral with the cover component and that co-operates with a respective latch cutout receptacle element when the carrier tray and cover components are properly assembled. The invention tray component is provided with multiple, integrally-molded depending IC package support legs associated with each tray component package matrix pocket, and the cover component is provided with correspondingly positioned multiple, integrally-molded depending IC package clamp legs that are associated with each cover component package matrix pocket and that each co-operatively nest with and within a respective one of the tray component depending IC package support legs when the tray component and the cover component are assembled.
With semiconductor IC packages properly positioned in the tray component package matrix pockets and supported by the tray component depending support leg elements, and with the integrally-molded latch elements of the tray component and of the cover component being co-operatively engaged, the cover component package matrix pocket depending clamp legs function to rigidly clamp the contained semiconductor IC packages in fixed positions relative to the carrier assembly and thereby enable the carrier assembly and contained semiconductor chip packages to be fully rotated about each possible rotational axis and moved at relatively high lateral velocities without ensuing displacement of any chip package relative to the carrier assembly.
A tool that may be either manually or mechanically operated is provided for releasing the carrier assembly engaged latch elements from secured engagement with each other to thereby facilitate complete disengagement of the carrier assembly cover component from the carrier assembly tray component and facilitate subsequent unloading of the contained semiconductor IC packages from the tray component.
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Standard, No. 95-1, Section 10, Nov. 1997, Revision C, Generic Matrix Tray for Handling and Shipping.
Jedec Solid State Products Engineering Council, USA.
Baker, Jr. Thomas S.
Luong Shian
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