Card manufacturing technique and resulting card

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Smart card package

Reexamination Certificate

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C257S685000, C257S787000

Reexamination Certificate

active

06597061

ABSTRACT:

FIELD OF THE INVENTION
The invention relates generally to circuit boards, a method of making a memory card integrating a circuit board, and the resulting memory card.
BACKGROUND OF THE INVENTION
This invention relates generally to circuit boards, and more specifically to circuit boards of memory cards utilized in portable devices to store data. Although the invention has application to a wide variety of circuit boards, it is described herein to be implemented in a memory card, specifically a portable memory card having flash electrically-erasable and programmable read-only memory (flash EEPROM).
In recent years, devices such as digital cameras, digital audio players, and personal digital assistants have become popular. These devices require a large amount of storage capacity in a small and rugged package. Memory cards utilizing high density non-volatile memory are frequently inserted and removed from these devices and printers or external readers attached to personal computers. The frequent handling of these cards results in a high risk of electrostatic discharge.
Thus, it is desired to have a small thin memory card that is immune from electrostatic discharge yet simple to manufacture and assemble.
SUMMARY OF THE INVENTION
Memory cards are getting smaller and thinner, yet the capacity is increasing and they are also becoming more densely packaged. Frequent handling of these cards results in a high risk of electrostatic discharge (ESD).
A memory card and a method of making a memory card resistant to damage from electrostatic discharge and less prone to short circuiting of the multiple conductive layers of the card is described. The memory card is formed by encapsulating or placing a circuit board into a plastic cover. At a junction between the plastic cover and an edge of the circuit board there is a gap where an electrostatic discharge is prone to enter and damage the circuit components of the memory card. The ground and power layer extend to the edge of the circuit board and along the junction between the circuit board and the memory card. Thus any electrostatic discharge is absorbed by either of these layers and damage to the other circuit components from the high voltage discharge is avoided. A prior method of avoiding short circuits due to the trimming process involved pulling back the entire edge of the conductive layer away from the edge of the circuit board, however this method affords little if any ESD protection to the susceptible components of the memory card.
During the manufacturing of the memory card, the circuit board is trimmed to its final dimensions. Conductive segments of a metallic layer that are located at the edge of the circuit board are deformed during the trimming process and can extend over an insulating layer and contact a second metallic layer, in this case either the ground or power layer, thus resulting a short circuit. As previously mentioned, it is desirous to extend the ground and/or power layer to the junction of the card for electrostatic discharge purposes. Therefore, in order to avoid short circuiting yet preserve maximum ESD protection, small gaps are formed at the edge of the second conductive layer that are vertically aligned with the conductive segments such that any deformation that may occur during the trimming process will not result in a short circuit. The deformation of the conductive segments will fall into the gap at the edge of the second conductive layer rather than making contact with the layer. The size of the gaps is small in relation to the remaining edge of the ground and/or power layer at the junction of the circuit board and the cover, thus ensuring a high level of ESD protection while avoiding short circuits from the trimming of the board.


REFERENCES:
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patent: 5969416 (1999-10-01), Kim
patent: 6040622 (2000-03-01), Wallace
patent: 6507117 (2003-01-01), Hikita et al.
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Patent Abstracts of Japan, vol. 1998, No. 14, Dec. 31, 1998 & JP 10 242608 A, Sep. 11, 1998, abstract.
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Patent Abstracts of Japan, vol. 016, No. 364, Aug. 6, 1992 & JP 04 114490 A, Apr. 15, 1992, abstract.
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