Card controlling semiconductor memory including memory cell...

Details Card controlling semiconductor memory including memory cell... Card controlling semiconductor memory including memory cell...

2007-06-25

2009-08-25

Dinh, Son (Department: 2824)

Static information storage and retrieval

Addressing

Plural blocks or banks

C365S189070, C365S236000

Reexamination Certificate

active

07580315

ABSTRACT:
A card controller includes an arithmetic processing device. The controller writes data to a semiconductor memory having a first memory block and a second memory block each including a plurality of nonvolatile memory cells each configured to hold at least 2 bits, data in the first memory block and data in the second memory block being each erased at a time. The arithmetic processing device writes the data to the memory cells in the first memory block using an upper bit and a lower bit of the at least 2 bits and writes the data to the memory cells in the second memory block using only the lower bit of the at least 2 bits.

REFERENCES:
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patent: 6801209 (2004-10-01), Chen et al.
patent: 2006/0004969 (2006-01-01), Suda
patent: 2006/0215450 (2006-09-01), Honma et al.
patent: 2008/0002467 (2008-01-01), Tsuji
patent: 2006-18471 (2006-01-01), None
U.S. Appl. No. 12/256,954, filed Oct. 23, 2008, Sukegawa.

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