Carbon nanotube transistors on a silicon or SOI substrate

Details Carbon nanotube transistors on a silicon or SOI substrate Carbon nanotube transistors on a silicon or SOI substrate

2010-02-04

2010-11-30

Ngo, Ngan (Department: 2893)

Active solid-state devices (e.g., transistors, solid-state diode

Specified wide band gap semiconductor material other than...

Diamond or silicon carbide

C257S382000, C257SE51040, C977S842000, C977S845000, C977S938000

Reexamination Certificate

active

07842955

ABSTRACT:
A method of forming a single wall thickness (SWT) carbon nanotube (CNT) transistor with a controlled diameter and chirality is disclosed. A photolithographically defined single crystal silicon seed layer is converted to a single crystal silicon carbide seed layer. A single layer of graphene is formed on the top surface of the silicon carbide. The SWT CNT transistor body is grown from the graphene layer in the presence of carbon containing gases and metal catalyst atoms. Silicided source and drain regions at each end of the silicon carbide seed layer provide catalyst metal atoms during formation of the CNT. The diameter of the SWT CNT is established by the width of the patterned seed layer. A conformally deposited gate dielectric layer and a transistor gate over the gate dielectric layer complete the CNT transistor. CNT transistors with multiple CNT bodies, split gates and varying diameters are also disclosed.

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