Capture of residual refractory metal within semiconductor...

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means

Reexamination Certificate

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C257S536000

Reexamination Certificate

active

09983166

ABSTRACT:
There is provided a semiconductor device with a configuration in which a dummy silicide area11is provided in the vicinity of a non-silicide area2to easily capture residual refractory metals, resulting in an improved yield by preventing the trapping of residual refractory metals into a non-silicide area and thereby reducing a junction leakage within the non-silicide area.

REFERENCES:
patent: 4484212 (1984-11-01), Komatsu et al.
patent: 4689579 (1987-08-01), Shibata et al.
patent: 5336631 (1994-08-01), Potyraj et al.
patent: 6001663 (1999-12-01), Ling et al.
patent: 6083785 (2000-07-01), Segawa et al.
patent: 0 814 499 (1997-12-01), None
patent: 03019273 (1991-01-01), None
patent: 11-214328 (1999-08-01), None

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