Electricity: electrical systems and devices – Electrostatic capacitors – Fixed capacitor
Reexamination Certificate
2000-05-17
2002-01-22
Dinkins, Anthony (Department: 2831)
Electricity: electrical systems and devices
Electrostatic capacitors
Fixed capacitor
C361S313000, C257S295000, C257S532000
Reexamination Certificate
active
06341056
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to electrical capacitors. More particularly, the present invention relates to a new and improved capacitor having multiple different dielectric materials, preferably formed in layers or films, between its plates. The different types of multiple dielectric materials are selected to optimize or improve electrical or physical characteristics of the capacitor, such as its change-in-capacitance per change-in-voltage (dC/dV), its change-in-capacitance per change-in-temperature (dC/dT), its leakage current, or its dielectric constant. Optimizing these characteristics achieves more reliable and predictable functionality, as well as precise operating characteristics, thereby making the capacitor more suitable for both analog and digital circuit functions when incorporated within an integrated circuit (IC).
BACKGROUND OF THE INVENTION
Capacitors are commonly employed in ICs for a variety of purposes, such as to condition signals, to store electrical charge, to block DC voltage levels, and to stabilize power supplies. In memory ICs, a capacitor is used to hold enough charge to represent a detectable logic state.
Polysilicon is typically used to construct the plates of the capacitor in a substrate of the IC. The diffusion and doping characteristics of polysilicon result in variable capacitance characteristics, in which the capacitance value varies relative to the voltage level applied to the capacitor and the temperature experienced by the capacitor. Despite the variable characteristics of polysilicon capacitors, the capacitance variation is not of primary concern in digital memory ICs. Memory capacitors are required only to accept charge, to hold some or all of the charge for a finite time period and then discharge, all in a reliable manner. Furthermore, since polysilicon is also used to fabricate other components of the IC, such as transistors and conductors, the plates of the capacitors can be formed simultaneously with the other components of the IC.
In analog or mixed signal circuit applications, on the other hand, capacitors are frequently used as impedance elements whose response characteristic must be linear. If the impedance of the capacitor is not fixed and reliably ascertainable, the response of the capacitor will vary non-linearly, causing unacceptable variations in the performance of the mixed signal circuit.
Application specific integrated circuits (ASICs) sometimes combine analog circuitry with digital circuitry on the same substrate. In such applications, the fabrication of capacitors has become somewhat problematic. Polysilicon is a semiconductor, which is not the best material to use as an electrode to form a capacitor. A space charge layer forms in the doped polysilicon and adversely affects the capacitance vs. voltage response (linearity) and the frequency response of the capacitor. When a metal material is used for the electrode, however, no space charge layer exists.
Many contemporary ICs employ multiple layers of interconnects, as an adjunct of their miniaturization. Interconnects are layers of separate electrical conductors which are formed overlying the substrate and which electrically connect various functional components of the IC. Because of space and volume considerations in ICs, attention has been focused upon the effective use of the space between the interconnect layers. Normally the space between the interconnect layers is occupied by an insulating material, known as an intermetal dielectric (IMD). One effective use for the space between the interconnect layers is to form capacitors in this space using the interconnect layers. The previously referenced U.S. patent applications focus on different techniques for combining capacitors with the conductors of the interconnect layers to achieve desirable effects within the IC.
Because the conductors of the interconnect layers are of metal construction, the capacitors formed between the interconnect layers are preferably of a metal-insulator-metal (MIM) construction. A MIM capacitor has metal plates, usually formed on the metal conductors of the interconnect layers. The fourth and fifth above identified inventions describe techniques for forming the metal capacitor plates with the conductors of the interconnect layers. The additional benefit of MIM capacitors is that they possess a higher degree of linearity and an improved frequency response. Unlike polysilicon capacitors, MIM capacitors incorporated within the interconnect levels are unobtrusive to the underlying digital components or circuitry. The use of a MIM capacitor within the interconnect levels can also reduce the size of the overall IC structure because the digital circuitry exists under the capacitor, instead of beside it. Additionally, MIM capacitors are readily fabricated as part of the interconnect layers without a significant increase in the number of process steps or in the manufacturing costs. Connecting the MIM capacitors in the interconnect layers to the appropriate components of the IC is relatively easily accomplished by post-like or plug-like “via interconnects” that extend between the interconnect layers as needed.
However, even the more linear MIM capacitors are susceptible to non-linear performance under the influence of different electrical and physical conditions, and even relatively small deviations from the expected and desired performance may be sufficient to diminish the effective use of such capacitors in precise linear or analog circuits or in digital circuits. Furthermore, in some circumstances it is desirable to have a greater capacity than has been previously available as a result of limited space availability within the IC and limitations imposed by the integration of the capacitor in the IC. In still other cases it is desirable to avoid some of the previously-unsolved problems associated with the dielectric materials of capacitors.
It is with respect to these and other background considerations that the present invention has evolved.
SUMMARY OF THE INVENTION
The improvement of the invention relates to combining multiple different dielectric materials, preferably in separate layers or films, between the electrode plates of the capacitor to achieve improved or optimized electrical, physical and/or performance characteristics of a capacitor, preferably a capacitor integrated in an integrated circuit (IC). By combining different dielectric materials, the undesirable electrical characteristics of the capacitor may be minimized or eliminated, the physical characteristics of the capacitor may be enhanced or improved, previously-existing problems of integrating high dielectric constant dielectric materials in capacitors integrated in ICs may be eliminated, and a wider range of dielectric constants for the capacitor dielectric material are available.
Another improvement of the present invention relates to combining a layer or film of relatively leakage current-prone, high dielectric constant material with surrounding barrier layers or films of relatively low leakage current, low dielectric constant materials. The relatively high dielectric constant material achieves larger capacitance density, or the same capacitance with a thicker capacitor dielectric structure, while any excessive leakage current attributable to the high dielectric material is blocked as a result of the relatively low leakage barrier films which prohibit the flow of leakage current through the high dielectric material.
These and other improvements are achieved in a capacitor having a pair of plates separated by a capacitor dielectric material formed of multiple separate layers of different dielectric materials which have different linearity characteristics. The different dielectric materials preferably include two materials which have opposite non-linearity characteristics with respect to one another. The relative thickness of each of the two layers is related to the relative magnitude fo the linearity response of each material, preferably to obtain an overall substantially-linear electrical characteristic for the capac
Allman Derryl D. J.
Bystedt Brian
Dinkins Anthony
LSI Logic Corporation
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