Electricity: battery or capacitor charging or discharging – Serially connected batteries or cells – Having variable number of cells or batteries in series
Reexamination Certificate
2001-11-01
2002-10-08
Tso, Edward H. (Department: 2838)
Electricity: battery or capacitor charging or discharging
Serially connected batteries or cells
Having variable number of cells or batteries in series
C320S166000
Reexamination Certificate
active
06462512
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a capacitor storage system, which consists of plural capacitors and with which parallel monitors are connected to monitor the terminal voltages of the respective capacitors and to initialize the capacitors.
2. Description of the Related Art
Where plural capacitors of large capacity are combined to build an electrical storage system, load voltages must be made uniform. This problem occurs when the capacitors are connected in series. We have already proposed an electrical storage system, termed an ECS (energy capacitor system), using electric double-layer capacitors (see, for example, Japanese patent laid-open No. 371996/1999) combined with an electronic circuit. In the ECS, a parallel monitor connected with each series-connected capacitor acts as a voltage-monitoring controller and detects the terminal voltage for initialization and the full charge level. The parallel monitor enables maximum charging within the withstand voltage of each capacitor.
FIG. 5
shows a conventional example of the capacitor storage system equipped with parallel monitors. This system has a charger
11
, as well as the parallel monitors. The system further includes comparators
12
and
13
, OR gates
14
and
15
, a capacitor C, a resistor R, a transistor Tr, and a switch S
1
for initialization. A reference voltage Vful is set to the full charge voltage of the capacitor, and another reference voltage Vini is set to an initialization voltage which is lower than the reference voltage Vful. A required number of capacitors (not shown in
FIG. 5
) similar to the capacitor C are connected in series below. Each capacitor has the same parallel monitor as the parallel monitor shown in FIG.
5
.
As shown in
FIG. 5
, the conventional parallel monitor has the separate comparators
12
and
13
for detection of the initialization voltage and the full charge voltage, respectively. The comparator
12
compares the voltage across the capacitor C with the initialization voltage Vini, judges whether the voltage across the capacitor C reaches the initialization voltage Vini, and produces a monitor signal I indicative of detection of the initialization voltage. During operation of initializing charging, the comparator
12
controls the transistor Tr connected in parallel with the capacitor C to bypass the charging current. In this way, the charge levels of capacitors are made uniform.
The switch SI for initialization is used to enable and disable initialization of the capacitor C in response to the initialization control signal S. When an initialization mode is selected, the initialization switch S
1
is closed. During initializing charging, if the voltage developed across the capacitor C reaches the initialization voltage Vini, the transistor Tr is turned on, thus forming a bypass circuit for the charging current. In this way, the charging current is limited. This charging current is set by the resistor R.
The comparator
13
is used as a voltage detection means for detecting that the full charge level is reached. The comparator
13
compares the voltage developed across the capacitor C with the full charge voltage Vful that is higher than the initialization voltage Vini and produces a monitor signal F indicative of detection of the full charge level. The charger
11
controls the charging according to this monitor signal F.
The output signals I from the comparator
12
and similar comparators (not shown) indicating detection of initialization voltage are ORed by the OR gate
14
. The output signals F from the comparator
13
and similar comparators (not shown) indicating detection of the full charge level are ORed by the OR gate
15
. The charger
11
charges the plural capacitors (including the shown capacitor C) connected in series, and makes various decisions regarding execution of operation for initializing, stopping of charging operation, and so on in response to the output signals from the OR gates
14
and
15
.
For example, when initializing charging is done, the charger
11
closes the initialization switch S
1
in response to the initialization control signal S. The charger
11
ORs the output signals I from the comparators such as
12
for their respective capacitors indicative of detection of initialization voltage, using the OR gate
14
. Thus, the charger judges that a bypass operation is started at one of the capacitors. The charger
11
ORs the output signals F from the comparators
13
for their respective capacitors indicative of the full charge level, using the OR gate
15
. Hence, the charger can end storage charging after judging one of the capacitors has reached the fill charge.
Accordingly, during charging, if the initialization voltage Vini is set lower than the full charge setting voltage Vful, and if the initialization switch S
1
is closed, the transistors, such as Tr, are successively turned on by the capacitors which are charged up to the initialization voltage Vini. The bypass circuit formed by the transistor and the resistor R bypasses a part of the charging current. This lowers the charging rate. As the charging process progresses and any one of the capacitors reaches the full charge setting voltage, the charger
11
stops the charging of a constant current. If necessary, relaxation charging is done.
In the above-described structure, each parallel monitor needs two comparators for detection of the initialization voltage Vini and for detection of full charge setting voltage Vful, respectively. This has complicated the configuration.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a capacitor storage system that is simple in structure, is capable of controlling charge levels according to the use environment, and is able to detect a fault, if any.
This object is achieved in accordance with the teachings of the present invention by a capacitor storage system comprising: a plurality of capacitors connected in series and producing terminal voltages, respectively, the capacitors developing a total voltage; parallel monitors connected with the capacitors, respectively, for monitoring terminal voltages of the capacitors and for initializing the capacitors; a charging control means for controlling charging of the series-connected capacitors according to the total voltage of the series-connected capacitors; and a charging stop total voltage-setting means for setting a charging stop total voltage Vm. Each of the parallel monitors has a comparator for detecting a predetermined initialization voltage Vini and a bypass circuit for bypassing a charging current of the corresponding capacitor, the bypass circuit receiving an output from the comparator as its control input. The charging control means enables the parallel monitors to perform an operation of initialization, if the initialization voltage is detected from any one of the capacitors, and then stops charging of the series-connected capacitors when the total voltage of the series-connected capacitors reaches the charging stop total voltage Vm.
In the capacitor storage system in accordance with the present invention, the charging control means can enable the parallel monitors to perform an operation of initialization for a given time, and the charging stop total voltage-setting means can set a charging stop total voltage Vm according to the total voltage obtained after the aforementioned given time or when the initialization voltage is detected.
In the capacitor storage system in accordance with the present invention, the charging stop total voltage-setting means can find the charging stop total voltage Vm by multiplying the total voltage Vxit, which is detected either after the operation of initialization is performed for the aforementioned given time or when the initialization voltage is detected, by the ratio of the full charge voltage Vful of each capacitor to the initialization voltage Vini.
In the capacitor storage system in accordance with the present invention, each of the parallel monitors can have a second capacitor for de
JEOL Ltd.
Tso Edward H.
Webb Ziesenheim & Logsdon Orkin & Hanson, P.C.
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