Capacitor layout orientation

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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Details

C257S068000, C257S071000, C257S300000

Reexamination Certificate

active

10609089

ABSTRACT:
The disclosed embodiments relate to a plurality of capacitive memory elements disposed on a substrate. The substrate may comprise a processor, a memory device or other integrated circuit device. The capacitive memory elements may have a generally oblong shape and may be capacitive elements. The capacitive memory elements may be disposed in a slanted orientation. The capacitive memory elements may be disposed in a non-orthogonal orientation. The capacitive memory elements may be disposed so that an axis through one of the plurality of capacitive memory elements is not generally parallel with an edge of the substrate. The axis may not be generally perpendicular with an orthogonal edge of the substrate. The plurality of capacitive memory elements may be arranged in a first row and a second row so that an axis through one of the plurality of capacitive memory elements located in the first row does not form an axis of any capacitive memory element in the second row.

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