Capacitor formed by lower electrode having inner and outer...

Electricity: electrical systems and devices – Electrostatic capacitors – Fixed capacitor

Reexamination Certificate

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Details

C361S305000, C257S308000, C257S310000

Reexamination Certificate

active

06307730

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a capacitor used in a dynamic random access memory (DRAM) device and a method for manufacturing such a capacitor.
2. Description of the Related Art
Generally, a typical memory cell of a DRAM device is formed by one switching metal oxide semiconductor (MOS) transistor and one capacitor for storing information. Also, this capacitor is a so-called stacked capacitor including a lower capacitor electrode, an upper capacitor electrode and a capacitor insulating layer therebetween.
A prior art stacked capacitor is constructed by a cylindrical lower capacitor electrode layer so as to enhance the capacity of the stacked capacitor. Also, in order to reduce the electric resistance to enhance the operation speed, the lower capacitor electrode layer is made of metal or metal compound such as tungsten (W) or titanium nitride (TiN). This structure is called a metal insulator metal (MIM) structure. This prior art stacked capacitor will be explained later in detail.
In the above-described prior art stacked capacitor, however, since the surfaces of the cylindrical capacitor electrode layer are flat, it is difficult to increase the capacity as a result of the ongoing trend of miniaturization.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a stacked capacitor capable of increasing the capacity.
Another object is to provide a method for manufacturing such a stacked capacitor.
According to the present invention, a stacked capacitor is constructed by a cylindrical lower capacitor electrode layer having uneven inner and outer surfaces, a capacitor insulating layer formed on the cylindrical lower capacitor electrode layer, and an upper capacitor electrode layer formed on the capacitor insulating layer.
The uneven inner and outer surfaces of the cylindrical lower capacitor electrode layer can be obtained by transferring hemi-spherical grained (HSG) polycrystalline silicon.


REFERENCES:
patent: 5874335 (1999-02-01), Jenq et al.
patent: 5963804 (1999-10-01), Figura et al.
patent: 2 334 621 A (1999-08-01), None
patent: 4-312971 (1992-11-01), None
patent: 10-158840 (1998-06-01), None
patent: 11-150249 (1999-06-01), None
patent: 11-214646 (1999-08-01), None
patent: 11-289062 (1999-10-01), None
patent: 2000-82746 (2000-03-01), None

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