Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
1999-10-14
2002-01-29
Nguyen, Tuan H. (Department: 2813)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
C438S003000, C438S240000
Reexamination Certificate
active
06342425
ABSTRACT:
This Application claims the benefit of Korean Application No. 10529/1999 filed on Mar. 26, 1999, which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a capacitor for a semiconductor memory device and a fabrication method thereof, and in particular, to a capacitor for a semiconductor memory device using a ferroelectric film as a dielectric film, and a fabrication method thereof.
2. Description of the Related Art
To achieve a higher integration rate in memory devices, a material having a high dielectric constant is used in order to increase storing capacity of a capacitor per unit area. Among materials having high dielectric constants, ferroelectric materials, such as Pb(Zr,Ti)O
3
(hereinafter referred to as ‘PZT’) and (Ba,Sr)TiO
3
(hereinafter referred to as ‘BST’) are compounds of ABO
3
form having a perovskite structure.
Since asymmetrical atoms exist in a lattice of the perovskite structure, a polarization generated due to an external electric field is considerably high. This is because an additional polarization is generated by a lattice displacement, in addition to an electric polarization which is normally generated when the external electric field is applied. As a result, the dielectric constant of ferroelectric materials of the perovskite structure is higher than that of other commonly used dielectric materials, such as SiO
2
, Si
3
N
4
and Ta
2
O
5
, by a few tens times. Thus, ferroelectric materials having the perovskite structure are employed in capacitors of a highly integrated memory device.
In addition, at a temperature below a Curie temperature and after the external electric field is removed, PZT, BST and the like have residual polarization in two different states depending on the direction of the external electric field. Thus, these materials can also be utilized as non-volatile memory devices.
In general, when a compressive stress is applied to a ferroelectric thin film, the lattice displacement is easily achieved, thereby improving its fatigue property or dielectric property. Based on this, a device property of a ferroelectric random access memory (FRAM) or a dynamic random access memory (DRAM) can be improved. There are two known methods of applying the compressive stress to the dielectric film: the first method is to use a difference in lattice constants between a substrate and the dielectric film, and the other method is to deposit the dielectric film after bending a substrate.
In accordance with the first method using the difference of the lattice constants, a material such as SrRuO
3
which has a similar lattice constant to the ferroelectric thin film is deposited on a MgO single crystal, and is provided with a preferred orientation. Thereafter, the ferroelectric thin film is deposited on SrRuO
3
, thereby causing a compressive stress to the ferroelectric thin film due to the difference in the lattice constant between SrRuO
3
and the ferroelectric thin film. However, SrRuO
3
must be epitaxially deposited on the MgO single crystal. Accordingly, the deposition process is complicated, and a MgO single crystal is required. As a result, this method is difficult to be applied to an actual device fabrication process.
According to the method of depositing the ferroelectric material after bending the substrate, a compressive stress is generated on the ferroelectric material by a restoring force of the bent substrate. However, it is difficult to mount the bent substrate in a deposition chamber. It is also difficult to heat the entire bent substrate at a uniform deposition temperature. In addition, it is impossible to apply a uniform stress to the entire substrate when it is bent. Thus, this method cannot be applied practically to an actual device fabrication process.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a capacitor for a semiconductor memory device and its fabrication method that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a capacitor for a semiconductor memory device where a compressive stress can be easily applied to a ferroelectric thin film and can be used in a practical device fabrication process.
Another object of the present invention is to provide a fabrication method for a capacitor of a semiconductor memory device with the above-mentioned advantages.
Additional features and advantages of the present invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure, particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described, a capacitor for a semiconductor device of the present invention includes: a semiconductor substrate; an interlayer insulation film having contact plugs filled with a conductive material and being formed on the semiconductor substrate; a diffusion barrier film formed on the interlayer insulation film including the contact plugs; a lower electrode formed on the diffusion barrier film; a dielectric film formed on the lower electrode; an upper electrode formed on the dielectric film; and a different type film formed adjacently to the upper electrode in order to apply a compressive stress to the dielectric film.
In another aspect, a method of fabricating a capacitor for a semiconductor device in accordance with the present invention includes a step for forming an interlayer insulation film having contact plugs filled with a conductive material on a semiconductor substrate; a step for forming a diffusion barrier film on the interlayer insulation film including the contact plugs; a step for forming a lower electrode on the diffusion barrier film; a step for forming a dielectric film on the lower electrode; a step for forming an upper electrode on the dielectric film; and a step for forming a different type film adjacently to the upper electrode in order to apply a compressive stress to the dielectric film.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5122477 (1992-06-01), Wolters et al.
patent: 5216572 (1993-06-01), Larson et al.
patent: 5385859 (1995-01-01), Enomoto
patent: 6239460 (2001-05-01), Kuroiwa et al.
Morgan & Lewis & Bockius, LLP
Nguyen Tuan H.
LandOfFree
Capacitor for semiconductor memory device and fabrication... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Capacitor for semiconductor memory device and fabrication..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Capacitor for semiconductor memory device and fabrication... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2848406