Capacitor constructions and semiconductor processing method of f

Details Capacitor constructions and semiconductor processing method of f Capacitor constructions and semiconductor processing method of f

1999-04-12

2000-10-31

Monin, Jr., Donald L.

Semiconductor device manufacturing: process

Making passive device

Stacked capacitor

438238, 438749, 438756, 438773, H01L 2120

Patent

active

061402036

ABSTRACT:
A semiconductor processing method of forming a capacitor includes, a) providing a mass of electrically insulative oxide of a first density; b) densifying the oxide mass to a higher second density, the densified oxide mass being characterized by a wet etch rate of less than or equal to about 75 Angstroms/minute in a 100:1 by volume H.sub.2 O:HF solution; c) providing an electrically conductive inner capacitor plate over the underlying electrically insulative oxide layer and thereby defining an insulative layer and inner capacitor plate transition edge; d) after densifying the oxide mass, providing a capacitor dielectric layer over the inner capacitor plate and densified oxide mass, the capacitor dielectric layer comprising a nitride, the nitride containing capacitor dielectric layer having less thickness depletion at the transition edge than would otherwise occur were the oxide mass not subject to said densifying; and e) providing an electrically conductive outer capacitor plate over the capacitor dielectric layer. A capacitor construction includes, i) a dense mass of electrically insulative oxide; ii) an electricaly conductive inner capacitor plate overlying and contacting the electrically insulative oxide mass; iii) a capacitor dielectric layer overlying the inner capacitor plate and oxide mass, the capacitor dielectric layer comprising a nitride; iv) an electrically conductive outer capacitor plate overlying the capacitor dielectric layer; and v) the dense mass of electrically insulative oxide contacting the inner capacitor plate being characterized by a wet etch rate of less than or equal to about 75 Angstroms/minute in a 100:1 by volume H.sub.2 O:HF solution.

REFERENCES:
patent: 5142438 (1992-08-01), Reinberg et al.
patent: 5286674 (1994-02-01), Roth et al.
patent: 5416041 (1995-05-01), Schwalke
A 0.29-vm.sup.2 MIM-CROWN Cell And Process Technologies for 1-Gigabit DRAMs, T. Kaga et al., IEDM 1994, pp. 927-929.

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