Electricity: battery or capacitor charging or discharging – Capacitor charging or discharging
Reexamination Certificate
2001-07-11
2002-11-05
Toatley, Jr., Gregory J. (Department: 2838)
Electricity: battery or capacitor charging or discharging
Capacitor charging or discharging
C307S108000
Reexamination Certificate
active
06476586
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATION
This application is based upon Japanese Patent Application No. 2000-209851 filed on Jul. 11, 2000, the contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a capacitor charge control circuit and a microcomputer using the circuit.
2. Description of the Related Art
Recently, plural ECUs (Electronic Control Units) are disposed in a vehicle to perform plural kinds of control of the vehicle. One of the EUCs unlocks doors of the vehicle when the ECU detects the vehicle is crashed, so that users can get out of the vehicle easily after the vehicle is crashed.
Such the ECU is shown in
FIG. 3. A
microcomputer
1
in the ECU has output ports
2
a
and
2
b
. Each of the ports
2
a
,
2
b
is connected to each of output interface circuits. Each of the output interface circuits is formed inside the microcomputer
1
, and has a CMOS structure composed of a p-channel type MOSFET
3
(high side FET) whose source is connected to a power supply terminal, and an n-type MOSFET
4
(low side FET) whose source is connected to a ground terminal. A drain and a gate of the FET
4
are connected to a drain and a gate of the FET
3
respectively to form a common gate and a common drain. The common gate is driven by an output signal from a CPU
17
to turn on/off the FETS. Each common drain of the output interface circuits is connected to the each of the output port
2
a
,
2
b
. Incidentally, a parasitic diode
5
or
6
is formed between the source and the drain in each of the FETs
3
and
4
.
The output port
2
a
is electrically connected to the ground through a series connected circuit composed of a resistor
7
, a diode
8
and a capacitor
9
. The output port
2
b
is connected to a base of an NPN bi-polar transistor
11
through a resistor
10
. A collector of the bi-polar transistor
11
is connected to a junction point between the diode
8
and the capacitor
9
through a resistor
12
. An emitter of the bi-polar transistor
11
is connected to the ground and the base thereof through a resistor
13
.
A junction point between the resistor
7
and the diode
8
is connected to an input port
15
of the microcomputer
1
through a resistor
14
. The input port
15
is connected to an input terminal of a comparator
16
. The comparator
16
outputs a signal to the CPU
17
. Protection diodes
18
and
19
. are connected between the power supply terminal and the input terminal, and between the input terminal and the ground, respectively.
When the vehicle crashes, an acceleration sensor disposed inside the vehicle detects impact caused by the crash as an acceleration signal. After the CPU
17
receives the acceleration signal from the sensor, the CPU
17
changes the output signal, applied to the FETs
3
and
4
at the output port
2
a
, from high level to low level. As a result, the FET
3
turns on, and the FET
4
turns off, so that the capacitor
9
is charged through the resistor
7
and the diode
8
.
In other words, there is a case where voltage of a battery (power source) drops instantaneously when the vehicle crashes. Consequently, the CPU
17
memorizes information that a large impact is applied to the vehicle (an abnormal situation such as the crash has occurred) by charging the capacitor
9
based on the signal from the acceleration sensor. When the CPU
17
restarts after being reset by a power-on-reset (activating sequence of the CPU
17
), the CPU
17
refers to an output signal of the comparator
16
, and determines whether a voltage level of the capacitor
9
is high or low.
In case of normal situation where the vehicle dose not crash, the capacitor
9
is not charged. Namely, the voltage of the capacitor
9
is at a low level after the power-on-reset. Therefore, the ECU does not perform anything based on the capacitor
9
.
On the other hand, in case of the crash, the CPU
17
detects the voltage of the capacitor
9
is at a high level, so that the ECU performs a process for unlocking the doors of the vehicle or the like.
Incidentally, a circuit connected to the output port
2
b
, in which the transistor
11
is included, is arranged to discharge the capacitor
9
. The circuit discharges the capacitor
9
by turning on the transistor
11
after the CPU
17
checks the voltage of the capacitor
9
. Accordingly, the capacitor
9
serves as a memory of 1 bit or a simplified memory.
Incidentally, the diode
8
prevents charges of the capacitor
9
from leaking. If the diode
8
is not disposed, the charges of the capacitor
9
can be discharged through the parasitic diode
5
when a voltage of the battery drops down to under a forward voltage of the diode
5
. Therefore, the diode
8
is disposed as shown in FIG.
3
.
Thus, although the CMOS (Complementary MOS) structure is disposed at the output port
2
a
, the FET
4
in the low side of the CMOS cannot discharge the capacitor
9
because of the diode
8
. Accordingly, the other CMOS circuit is disposed at the output port
2
b
for discharging the capacitor
9
. Moreover, a similar problem caused by the parasitic diode
5
occurs at the other CMOS circuit, so that the transistor
11
is required to discharge the capacitor
9
. Therefore, a circuit diagram is complicated inevitably.
SUMMARY OF THE INVENTION
This invention has been conceived in view of the background as described above and an object of the invention is to provide a capacitor charge control circuit capable of being composed of a simple circuit, and to provide a microcomputer using the same.
According to a first aspect of the present invention, two n-type MOSFETs are connected with each other so as to form a totem pole connection, i.e., to form a series connection. Output terminals of the MOSFETs are connected to a capacitor at a common connecting point.
Incidentally, the two MOSFETs may work a discharging circuit of the capacitor altogether.
Preferably, one of the MOSFETs works as a charging circuit, and the other of the MOSFETs works as a discharging circuit. In this case, a port of the microcomputer for outputting charges from the one of the MOSFETs can be served as a port for discharging charges of the capacitor through the other of the MOSFETs.
Other objects, features and advantages of the present invention will become more apparent from the following detailed description made with reference to the accompanying drawings.
REFERENCES:
patent: 6326772 (2001-12-01), Kusumoto et al.
Ishihara Hideaki
Yunosawa Yoshinori
Denso Corporation
Law Offices of David G. Posz
Toatley , Jr. Gregory J.
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