Capacitor averaging converter

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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Details

C341S122000

Reexamination Certificate

active

07429946

ABSTRACT:
A capacitor-averaging pipeline analog-to-digital converter has a plurality of stages. Each of the plurality of stages has a first switched capacitor circuit and a second switched capacitor circuit parallel with the first switched capacitor circuit. A corresponding method is also disclosed.

REFERENCES:
patent: 6342919 (2002-01-01), Opris
patent: 2004/0012697 (2004-01-01), Rossi
patent: 2006/0061502 (2006-03-01), Masato et al.
Bang-Sup Song, Michael F. Tompsett, Kadaba R. Lakshmikumar; A 12-bit 1-Msample/s Capacitor Error-Averaging Pipelined A/D Converter; IEEE Journal of Solid-State Circuits; Dec. 1998; vol. 23, No. 6.
Hsin-Shu Chen, Bang-Sup Song, Kantilal Bacrania; A 14-b 20-MSamples/s CMOS Pipelined ADC; IEEE Journal of Sold-State Circuits; Jun. 2001; vol. 36, No. 6.
Yun Chiu, Paul R. Gray, Borivoje Nikolié; A 14-b 12-MS/s CMOS Pipeline ADC With Over 100-dB SFDR; IEEE Journal of Solid-State Circuits: Dec. 2004; vol. 39, No. 12.

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