Electricity: electrical systems and devices – Electrostatic capacitors – Fixed capacitor
Reexamination Certificate
2002-09-26
2004-09-07
Reichard, Dean A. (Department: 2831)
Electricity: electrical systems and devices
Electrostatic capacitors
Fixed capacitor
C361S313000, C257S303000
Reexamination Certificate
active
06788521
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a capacitor for use in semiconductor integrated circuit devices for communication, etc. and a method for fabricating the capacitor.
Semiconductor integrated circuit devices for communication include a large number of capacitors having large areas and large capacitances. Accordingly, it is important how to increase breakdown voltage yield and reliability of the capacitors.
A conventional method for fabricating a capacitor used in semiconductor integrated circuit devices for communication will be explained with reference to
FIGS. 14A-14C
and
15
A-
15
B.
An Au (gold) film, for example, is deposited on a substrate
100
and patterned to form a lower electrode
102
(FIG.
14
A).
Next, a silicon nitride film
104
which functions as an interconnection cover film and a capacitor dielectric film is formed on the substrate
100
with the lower electrode
102
formed on (FIG.
14
B).
Then, an inter-layer insulation film
106
of benzocyclobutene (hereinafter also called BCB) or polyimide (hereinafter also called PI) is formed on the silicon nitride film
104
.
Then, a silicon nitride film
108
is deposited on the inter-layer insulation film
106
and patterned (FIG.
14
C).
Next, with the silicon nitride film
108
as a mask, the inter-layer insulation film
106
is etched to form an opening
110
reaching the silicon nitride film
104
(FIG.
15
A). The etching of the inter-layer insulation film
106
is, e.g., plasma etching using a gas of oxygen with a trace of fluorine-based gas added to. The plasma etching is followed by wet processing using a hydrofluoric acid-based chemical solution as processing for removing residual silicon produced upon the etching.
Then, an upper electrode
112
is formed on the silicon nitride film
104
exposed in the opening
110
, extended over the inter-layer insulation film
106
(FIG.
15
B).
A capacitor comprising the lower electrode
102
, the capacitor dielectric film of the silicon nitride film
104
and the upper electrode
112
has been thus fabricated.
In the above-described method for fabricating conventional capacitor, in etching the inter-layer insulation film
106
to form the opening
110
, the lower silicon nitride film
104
is exposed to the etching atmosphere. Considering fluctuation of film thickness, etc., a prescribed over etching is conducted in etching the inter-layer insulation film
106
.
Accordingly, the silicon nitride film
104
is damaged in etching the inter-layer insulation film
106
. Resultantly, the silicon nitride film
104
has distributed film decreases or is damaged, which has made it impossible to form a capacitor of high accuracy and reliability.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a capacitor having high capacitance value controllability and reliability, and a method for fabricating the capacitor.
According to one aspect of the present invention, there is provided a capacitor comprising: a lower electrode formed on a substrate; an insulation film formed on the substrate with the lower electrode formed on, and having an opening on the lower electrode; a capacitor dielectric film formed on the lower electrode in the opening, and having a larger film thickness at a peripheral part of the opening than at a central part of the opening; and an upper electrode formed on the capacitor dielectric film.
According to another aspect of the present invention, there is provided a capacitor comprising: a lower electrode formed on a substrate; a first insulation film formed on the substrate with the lower electrode formed on, and having a first opening on the lower electrode; a second insulation film formed on the first insulation film, and having a second opening in a region where the first opening is formed; a capacitor dielectric film formed on the lower electrode in the opening, and extended over the second insulation film; and an upper electrode formed on the capacitor dielectric film.
According to further another aspect of the present invention, there is provided a method for fabricating a capacitor comprising the steps of: forming a lower electrode on a substrate; forming a first insulation film on the substrate with the lower electrode formed on; forming a second insulation film on the first insulation film; forming an opening reaching the lower electrode in the first insulation film and the second insulation film; forming a capacitor dielectric film on the lower electrode, extended over the second insulation film; and forming an upper electrode on the capacitor dielectric film.
As described above, according to the present invention, the capacitor dielectric film is formed after the opening for exposing the lower electrode is formed in the inter-layer insulation film
16
, whereby the capacitor dielectric film can be kept from being exposed to the etching atmosphere. Thus, the intra-distribution and fluctuation of the film thickness of the capacitor dielectric film, and degradation of the film quality can be prevented.
The capacitor dielectric film is thicker selectively at a peripheral part of the opening formed in the inter-layer insulation film, whereby degradation of breakdown voltage, stress resistance, etc. due to the coverage of the capacitor dielectric film can be suppressed.
The opening is formed in the inter-layer insulation film in a large area containing a region for the lower electrode formed in, whereby even when the peripheral part of the opening has parts of poor coverage of the capacitor dielectric film, the parts are away from between the lower electrode and the upper electrode. Accordingly, the capacitor dielectric film can be highly reliable in breakdown voltage, stress resistance, etc.
REFERENCES:
patent: 5293510 (1994-03-01), Takenaka
patent: 5811851 (1998-09-01), Nishioka et al.
patent: 6051859 (2000-04-01), Hosotani et al.
patent: 6184551 (2001-02-01), Lee et al.
patent: 6215646 (2001-04-01), Ochiai et al.
patent: 05-343613 (1993-12-01), None
patent: 08-181282 (1996-07-01), None
patent: 09-121020 (1997-05-01), None
patent: 2000-228497 (2000-08-01), None
Copy of Office Action dated Sep. 9, 2003 from Japanese Patent Office in Application No. 0100322.
Fujitsu Quantum Devices Limited
Reichard Dean A.
Thomas Eric
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