Semiconductor device manufacturing: process – Making passive device – Planar capacitor
Reexamination Certificate
2002-12-23
2004-07-13
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making passive device
Planar capacitor
C257S532000
Reexamination Certificate
active
06762107
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a capacitor and manufacturing method thereof.
BACKGROUND ART
Conventional small-sized capacitors are known in which an electrode section composed of a thin-film dielectric layer or a metal film is formed on a relatively rigid substrate such as ceramic or an epoxy resin. However, it is possible to reduce a thickness of the thin-film dielectric layer or electrode section of such a capacitor, whereas a substrate of this kind may be damaged or broken if its thickness is reduced below a certain value (e.g. 0.5 mm). Thus, there is a limit on a reduction in the thickness of such a capacitor. It has been difficult to use this capacitor in a product of thickness smaller than 1 mm.
To deal with this, a film-like flexible substrate has been provided which is composed of a very flexible organic resin substrate such as polyimide which has a thickness of 0.1 mm or smaller as disclosed in, for example, Japanese Patent Laid-Open No. 11-97287. Even if the flexible substrate is made thinner, a capacitor of this kind is not damaged or broken because the flexible substrate itself can be bent. Accordingly, the thickness of the substrate and thus of the entire capacitor can be reduced. Consequently, this capacitor can be used in an IC card of thickness about 1 mm or a thinner product.
A capacitor of this kind is manufactured, for example, as shown in FIGS.
23
(
a
) to
23
(
c
). First, as shown in FIG.
23
(
a
), a lower electrode
103
and an external leader electrode
104
are formed so as to cover the opposite sides and top surface of a film-like very flexible substrate
101
and to have a gap
102
between themselves so that the electrodes
103
and
104
are not electrically connected together. Then, a dielectric
105
is formed on the top surfaces of the lower electrode
103
and the external leader electrode
104
so as to extend across these electrodes. Subsequently, as shown in FIG.
23
(
b
), a hole
105
a
for a contact hole is formed through the dielectric
105
at a position corresponding to the external leader electrode
104
. An upper electrode
106
is formed on the dielectric
105
including the hole
105
a
so as to electrically connect the upper electrode
106
and the external leader electrode
104
together. Subsequently, a protective layer
107
is formed at the top of these layers as required.
Thereby, as shown in FIG.
23
(
c
), a capacitor is constructed in which the lower electrode
103
and the upper electrode
106
constitute a capacitance across the dielectric
105
. In this case, a very thin capacitor can be constructed by using a thin flexible substrate
101
and thinning the lower electrode
103
, the external leader electrode
104
, the dielectric
105
, the upper electrode
106
, and others. Further, since the flexible substrate
101
is used, even if it is thin, the substrate is prevented from being disadvantageously damaged and broken.
Further, a capacitor having plural layers of dielectrics
105
A and
105
B and plural layers of upper electrodes
106
A and
106
B is manufactured, for example, as shown in FIGS.
24
(
a
) to
24
(
d
). First, as shown in FIG.
24
(
a
), the lower electrode
103
and the external leader electrode
104
are formed so as to cover the opposite sides and top surface of the film-like very flexible substrate
101
and to have the gap
102
between themselves so that the electrodes
103
and
104
are not electrically connected together. Then, as shown in FIG.
24
(
b
), a first dielectric
105
A is formed on the top surface portions of the lower electrode
103
and the external leader electrode
104
. Subsequently, a first upper electrode
106
A is formed on the top surfaces of the first dielectric
105
A and the external leader electrode
104
. Further, a part of the first upper electrode
106
A is formed so as to extend onto the external leader electrode
104
so that the first upper electrode is electrically connected to the external leader electrode
104
. Then, as shown in FIG.
24
(
c
), a second dielectric
100
B is formed on the first upper electrode
106
A. Furthermore, a second upper electrode
106
B is formed on the second dielectric
105
B. Further, a part of the second upper electrode
106
B is formed so as to extend onto the lower electrode
103
so that the second upper electrode is electrically connected to the lower electrode
103
. If more layers of dielectrics or upper electrodes are required, operations of forming these dielectrics or upper electrodes are repeated. Subsequently, the protective layer
107
is formed at the top of these layers as required.
Thus, as shown in FIG.
24
(
d
), a capacitor is constructed in which the lower electrode
103
and the first and second upper electrodes
106
A and
106
B constitute a capacitance across the first and second dielectrics
105
A and
105
B. Also in this case, a very thin capacitor can be constructed by using the thin flexible substrate
101
and thinning the lower electrode
103
, the external leader electrode
104
, the dielectrics
105
A and
105
B, the upper electrodes
106
A and
106
B, and others.
Further, in another example, as shown in FIG.
25
(
a
), a lower-electrode-connected external leader electrode
111
connected to the lower electrode
103
and an upper-electrode-connected external leader electrode
104
connected to the upper electrode
106
are formed so as to cover the opposite sides of the film-like flexible substrate
101
. Then, a lower electrode
112
is formed so as to extend across the neighborhood of end surface portion of the lower-electrode-connected external leader electrode
111
and an external exposed surface of the flexible substrate
101
. The lower electrode
112
is then connected to the lower-electrode-connected external leader electrode
111
. Subsequently, as shown in FIG.
25
(
b
), the dielectric
105
is formed on the top surfaces of the lower electrode
111
and the upper-electrode-connected external leader electrode
104
so as to extend across these electrodes. Then, the hole
105
a
is formed through the dielectric
105
at the position corresponding to the upper-electrode-connected external leader electrode
111
. The upper electrode
106
is formed on the dielectric
105
including the hole
105
a
so as to electrically connect the upper electrode
106
and the external leader electrode
104
together. Subsequently, the protective layer
107
is formed at the top of these layers as required.
Thus, a capacitor is constructed in which the lower electrode
112
and the upper electrode
106
constitute a capacitance across the dielectric
105
. Also in this case, a very thin capacitor can be constructed by using the thin flexible substrate
101
and thinning the lower-electrode-connected external leader electrode
111
and upper-electrode-connected external leader electrode
104
, the lower electrode
112
, the dielectric
105
, the upper electrode
106
, and others.
In this case, in a capacitor such as the one shown in
FIG. 23
, the wall surface of the hole portion
105
a
, formed in the dielectric
105
, is formed substantially at a right angle (about 80 to 90°) to the flexible substrate
101
in order to connect the upper electrode
106
to the external leader electrode
104
, as shown in the enlarged view of FIG.
26
. Accordingly, corners
106
a
,
106
b
,
106
c
, and
106
d
of the upper electrode
106
formed along the hole portion
105
a
of the dielectric
105
are formed to be bent substantially at right angles.
Further, end surfaces of the lower electrode
103
and external leader electrode
104
which face each other via the gap
102
are formed substantially at right angles to the flexible substrate
101
. Thus, the corners
105
b
,
105
c
,
105
d
, and
105
e
of the dielectric
105
and corners
106
e
,
106
f
,
106
g
, and
106
h
of the upper electrode
106
, all of which are formed along the gap
102
, are also formed to be bent substantially at right angles.
Further, in a capacitor such as the one shown in
FIG. 24
, end surfaces
105
s
and
105
p
of t
Higashida Takaaki
Hisamura Hirotaka
Imanaka Takashi
Itoi Shinsuke
Katsube Jun
Matsushita Electric - Industrial Co., Ltd.
Nelms David
Parkhurst & Wendel L.L.P.
Vu David
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