Capacitive transformer having a switch responsive to clock signa

Electric power conversion systems – Current conversion – With voltage division by storage type impedance

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307109, H02M 306

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active

055964893

ABSTRACT:
A transformer including two half capacitive transformers operating in antiphase. Each half capacitive transformer steps an input voltage down during one phase of a clock signal. Each half capacitive transformer uses a number of capacitors and switching circuitry controlled by a clock signal. According to whether the clock signal is active or inactive, the switching circuitry places the half capacitive transformer in one of two configurations. In a first embodiment, in one configuration the capacitors are coupled in parallel between the input voltage and the output port, while in the other configuration, the capacitors are coupled in series between the output port and ground. In an alternative embodiment of the half capacitive transformer, in one configuration the capacitors are coupled in series between the input voltage and the output port while in the other configuration the capacitors are coupled in parallel between the output port and ground. The step-down ratio of the transformer is related to the number of capacitors included in a half capacitive transformer and not to the values of the capacitors. The capacitive transformer may step up voltages by swapping the input and output ports.

REFERENCES:
patent: 4433282 (1984-02-01), Squires
patent: 4578772 (1986-03-01), Fujii
patent: 5187421 (1993-02-01), Naito
patent: 5339236 (1994-08-01), Tamagawa
patent: 5414614 (1995-05-01), Fette et al.
patent: 5461557 (1995-10-01), Tamagawa
Linear Technology Corporation, "1046 Datasheets, Inductorless +5V to -5V Converter", pp. 1-8, 1991.

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