Electric lamp and discharge devices: systems – Plural power supplies – Plural cathode and/or anode load device
Reexamination Certificate
2003-01-22
2004-08-24
Vannucci, James (Department: 2821)
Electric lamp and discharge devices: systems
Plural power supplies
Plural cathode and/or anode load device
C315S169100, C345S060000
Reexamination Certificate
active
06781322
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a plasma display apparatus. More particularly, the present invention relates to an improvement of a drive circuit that applies a voltage pulse to an electrode at which a sustain discharge is caused to occur.
The plasma display apparatus has been put to practical use as a flat display and is a thin display with high luminance.
FIG. 1
is a diagram that shows the general structure of a conventional three-electrode AC-driven plasma display apparatus. As shown schematically, the plasma display apparatus comprises a plasma display panel (PDP)
1
composed of two substrates, between which a discharge gas is sealed, each substrate having plural X electrodes (X
1
, X
2
, X
3
, . . . , Xn) and Y electrodes (Y
1
, Y
2
, Y
3
, . . . , Yn) arranged adjacently by turns, plural address electrodes (A
1
, A
2
, A
3
, . . . , Am) arranged in the direction perpendicular thereto, and phosphors arranged at crossings, an address driver
2
that applies an address pulse to the address electrode, an X common driver
3
that applies a sustain discharge pulse to the X electrode, a scan driver
4
that applies a scan pulse sequentially to the Y electrode, a Y common driver
5
that supplies a sustain discharge pulse to be applied to the Y electrode to the scan driver
4
, and a control circuit
6
that controls each section, and the control circuit
6
further comprises a display data control section
7
that includes a frame memory and a drive control circuit
8
composed of a scan driver control section
9
and a common driver control section
10
. The X electrode is also referred to as the sustain electrode and the Y electrode is also referred to as the scan electrode. As the plasma display apparatus is widely known, a more detailed description of the entire apparatus is not given here and only the X common driver
3
and the Y common driver
5
that relate to the present invention are further described. The X common driver, the scan driver and the Y common driver of the plasma display apparatus have been disclosed, for example, in Japanese Patent No. 3201603, Japanese Unexamined Patent Publication (Kokai) No. 9-68946 and Japanese Unexamined Patent Publication (Kokai) No. 2000-194316.
FIG. 2
is a diagram that shows an example of the structure of the X common driver, the scan driver and the Y common driver, which have been disclosed as described above. The plural X electrodes are connected commonly and driven by the X common driver
3
. The X common driver
3
comprises output devices (transistors) Q
8
, Q
9
, Q
10
and Q
11
, which are provided between the common X electrode terminal and a voltage source +Vs1, between that and −Vs2, between that and +Vx, and between that and the ground (GND), respectively. By turning on any one of the transistors, the corresponding voltage is supplied to the common X electrode terminal.
The scan driver
4
is composed of individual drivers provided for each Y electrode and each individual driver comprises transistors Q
1
and Q
2
, and diodes D
1
and D
2
provided in parallel thereto, respectively. One end of each transistor Q
1
and Q
2
, and of diodes D
1
and D
2
of each individual driver, is connected to each Y electrode and each other end is connected commonly to the Y common driver
5
. The Y common driver
5
comprises transistors Q
3
, Q
4
, Q
5
, Q
6
and Q
7
, which are provided between the lines from the scan driver
4
and the voltage sources +Vs1, −Vs2, +Vw, the ground (GND) and −Vy, respectively, and the transistors Q
3
, Q
5
and Q
7
are connected to the transistor Q
1
and the diode D
1
, and the transistors Q
4
and Q
6
, to the transistor Q
2
and the diode D
2
.
FIG. 3
is a diagram that shows drive waveforms of a plasma display apparatus. The operations in the circuit shown in
FIG. 2
are described with reference to FIG.
3
. In a reset period, Q
5
and Q
11
are turned on while the other transistors are being kept off, and +Vw (a third voltage) is applied to the Y electrode and 0V is applied to the X electrode to generate an entire write/erasure pulse that brings the display cells in the panel
1
into a uniform state. At this time, the voltage +Vw is applied to the Y electrode via Q
5
and D
1
. In an address period, Q
6
, Q
7
and Q
10
are turned on while the other transistors are being kept off, and +Vx is applied to the X electrode, the voltage GND, to the terminal of Q
2
, and −Vy (−Vs2 in
FIG. 3
) is applied to the terminal of Q
1
. In this state, a scan pulse that turns Q
1
on and turns Q
2
off is applied sequentially to the individual drivers. At this time, in individual drivers to which a scan pulse is not applied, Q
1
is turned off and Q
2
is turned on, therefore, −Vy is applied to the Y electrode, to which the scan pulse is applied, via Q
1
, GND is applied to the other Y electrodes via Q
2
, and an address discharge is caused to occur between the address electrode to which a positive data voltage is applied and the Y electrode to which the scan pulse is applied. In this way, each cell in the panel is put into a state according to the display data.
In a sustain discharge period, while Q
1
, Q
2
, Q
5
to Q
7
, Q
10
and Q
11
are being kept off, Q
3
and Q
9
, and Q
4
and Q
8
are alternately turned on. These transistors are called the sustain transistors, wherein Q
3
and Q
8
that are connected to a high potential side power source are called the high-side switches, and Q
4
and Q
9
that are connected to a low potential side power source are called the low-side switches, here. In this way, +Vs1 (a first voltage) and −Vs2 (a second voltage) are alternately applied to the Y electrode and the X electrode and a sustain discharge is caused to occur in the cell in which an address discharge has been caused to occur in the address period and the display is performed. At this time, if Q
3
is turned on, +Vs1 is applied to the Y electrode via D
1
, and if Q
4
is turned on, −Vs2 is applied to the Y electrode via D
2
. In other words, the voltage Vs1+Vs2 is alternately applied to the X electrode and the Y electrode, with a reversed polarity, in the sustain discharge period. This voltage is called the sustain voltage here.
The example described above is only one of various examples, and there are various modifications as to which kind of voltage is applied in the reset period, the address period and the sustain discharge period, and there are also various modifications of the scan driver
4
, the Y common driver
5
and the X common driver
6
. Particularly in the drive circuit described above, +Vs1 and −Vs2 are applied alternately to the Y electrode and the X electrode to apply the sustain voltage of Vs1+Vs2=Vs, but there is another method in which Vs and GND are applied alternately and it is widely used.
In the general plasma display apparatus, the voltage Vs is set to a value between 150V and 200V, and the drive circuit is made up of transistors of large voltage rating (breakdown voltage). Contrary to this, in the driving method disclosed in such as Japanese Patent No. 3201603, Japanese Unexamined Patent Publication (Kokai) No. 9-68946 and Japanese Unexamined Patent Publication (Kokai) No. 2000-194316, the positive and negative sustain voltages (+Vs/2 and −Vs/2) are applied alternately to the X electrode and the Y electrode, as described above. This has an advantage in that it will be possible to reduce the breakdown voltage of the smoothing capacitor of the power source that supplies the sustain voltage.
U.S. Pat. No. 4,070,633 has disclosed a control system in which an inductance element that constitutes a resonance circuit together with a capacitor in a display unit is provided in order to reduce the power consumption of a capacitive display unit, such as an EL (Electro-Luminescence) display panel. Moreover, U.S. Pat. Nos. 4,866,349 and 5,081,400 have disclosed a sustain (discharge) driver and an address driver for a PDP panel having
Ito Eiji
Kamada Masaki
Kumakura Ken
Ohki Hideaki
Onozawa Makoto
Fujitsu Hitachi Plasma Display Limited
Staas & Halsey , LLP
Vannucci James
Vu Jimmy T.
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