Electricity: electrical systems and devices – Electric charging of objects or materials
Reexamination Certificate
1999-09-27
2003-01-07
Leja, Ronald W. (Department: 2836)
Electricity: electrical systems and devices
Electric charging of objects or materials
C347S009000
Reexamination Certificate
active
06504701
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a capacitive element drive device for driving a capacitive element such as a piezoelectric member and a liquid crystal member.
A drive device for driving an ink-jet head is an example of a capacitive element drive device of this kind.
FIG. 20
shows a structure of an ink-jet head
3
in a share-mode. The ink-jet head
3
comprises a plurality of ink chambers
81
,
82
, . . . constructed of piezoelectric members and electrodes
91
,
92
, . . . provided to inside walls of the respective ink chambers. The ink chambers
81
. . . are partitioned by the respective piezoelectric members
111
,
112
, . . .
A conventional head drive device
4
for driving such an ink-jet head
3
is shown in FIG.
21
. The head drive device
4
comprises a serial/parallel converter
75
, AND gates
76
, EX-OR gates
77
and drive circuits
78
. Output terminals
79
,
80
, . . . of the drive circuits
78
are connected to the respective electrodes
91
,
92
, . . . of the ink chambers.
The drive circuit
78
, as shown in
FIG. 22
, comprises an input terminal
97
, an output terminal
89
, a power supply
98
, resistors R
1
to R
5
and bipolar transistors Tr
1
to Tr
4
. In this drive circuit
78
, when a signal input to the input terminal
97
assumes “1”, the bipolar transistor Tr
1
is turned on and a power supply voltage is applied to the output terminal
89
, while when the signal input assumes “0”, the bipolar transistor Tr
2
is turned on and the output terminal
89
assumes the ground voltage (0V).
The serial/parallel converter
75
of
FIG. 21
is sequentially input with serial print data signals P at cycles of a clock signal C and converts the serial print data signals P into parallel data. When the converter
75
stores print data of one line, the serial/parallel converter
75
latches parallel output in response to a latch signal R.
When a jet signal J as shown in
FIG. 23A
is input, an electrode potential of a particular ink chamber is raised as shown
23
D and a piezoelectric member constituting a partition wall is applied with the power supply voltage V. At this time, the particular ink chamber is expanded to increase its inside volume. Then when inversion signal T as shown in
FIG. 23B
is input, an electrode potential of an ink chamber adjacent to the particular ink chamber is raised as shown in
FIGS. 23C and 23E
and a voltage −V of a polarity opposite from the power supply voltage V is applied to the piezoelectric member of the partition wall. That is, the applied voltage of the partition wall is changed from +V to −V, which results in a change of 2V in applied voltage. On this change, the particular ink chamber is rapidly contracted to reduce the inside volume, which causes an ink in the ink chamber to be ejected.
FIG. 24
shows another example of the drive circuit. The drive circuit
102
comprises a jet voltage generating circuit
100
with an input terminal
97
a
and a discharge circuit
101
with an input terminal
97
b.
When only the input terminal
97
a
is input with an input signal “1”, the power supply voltage is applied to the output terminal
69
from the power supply
98
while when only the input terminal
97
b
is input with an input signal “1”, the output terminal
69
goes to the ground voltage (0 V).
FIG. 23
is a logical timing chart in which rounding of a signal in rise time and fall time due to a circuit characteristic is omitted and there is a delay in an actual output of a driver circuit. Therefore, actually, there is existent a time period t from when a voltage driving the ink chamber
83
starts decreasing as shown in
FIG. 25
until an increase in a voltage for driving peripheral ink chambers
82
and
84
is leveled high.
Generally in order to reduce power consumption or other purposes, MOS (Metal Oxide Semiconductor) transistors are substituted for bipolar transistors. In the drive circuit as shown in
FIG. 22
or
24
as well, it is considered that MOS transistors are used instead of bipolar transistors.
However, in a case where a drive circuit is constructed with setting that a substrate potential of a P-MOS transistor is a power supply voltage (VDD) and a substrate potential of an N-MOS transistor is the ground voltage (VSS), a problem as described below is conceived.
When ink is ejected out from an ink jet orifice by applying a voltage to the electrode of each ink chamber as shown in
FIG. 23
, there is a need that an intra-terminal applied voltage of a piezoelectric member is rapidly changed from +VDD to −VDD opposite from +VDD. That is, it is necessary to shorten a time period, as much as possible, from when a voltage given to the electrode of an ink chamber to be driven starts decreasing until an increase in a voltage given to the electrode of a peripheral ink chamber is leveled off (see FIG.
25
).
However, if the time period t is too short, the drain of a P-MOS transistor connected to an electrode of a piezoelectric element, that is a capacitive element, has a risk to assume a higher voltage than the power supply voltage (VDD), or the drain of an N-MOS transistor assumes a lower voltage than the ground voltage (VSS). This is because of delays of rise-up/fall-down in output voltage due to a characteristic of a drive circuit element, and the occurrence of induction and the like in a capacitive element due to rapid changes in the voltage applied to the electrode of an adjacent ink chamber. Hence, a current flows through a parasitic diode of one of the MOS transistors. The parasitic diodes here are diode regions between a P type semiconductor and an N type semiconductor both of which reside between the drain and the substrate and between the source and the substrate of a MOS transistor.
As described above, when the drain of a P-MOS transistor assumes a higher voltage than the power supply voltage (VDD), or when the drain of an N-MOS transistor assumes a lower voltage than the ground voltages (VSS), a current flows though the parasitic diode, that is, a current flows through the substrate of a MOS transistor. As a result, a problem arises since the reliability of the drive circuit is deteriorated. Especially, if repetitions of a turn-on/turn-off of a MOS transistor are affected as in the case where an ink jet head is driven, a current repeatedly flows through the substrate of a MOS transistor, which greatly degrades reliability of a drive circuit.
There has been no idea that a time period from when a decrease in an electrode voltage of an ink chamber constructed of a piezoelectric member gets started until an increase in electrode voltage of an adjacent ink chamber is level off is adjusted.
Therefore, in the above described drive device, the substitution of MOS transistors for bipolar transistors cannot provide a high reliability device.
BRIEF SUMMARY OF THE INVENTION
The present invention provides a capacitive element drive device low in power consumption and high in reliability at a lower cost.
A capacitive element drive device of the present invention is directed to a capacitive element drive device for driving a capacitive element by supplying a first potential difference between terminals of the capacitive element and thereafter, supplying a second potential difference of a polarity opposite from the first potential difference, wherein one of a discharge operation and charge operation of the capacitive element can be set in a time period from when supply of the first potential difference gets started till supply of the second potential difference gets started and the time period is less than a time period in which one of the discharge operation and the charge operation is substantially completed and more than a predetermined time interval.
A capacitive element drive device of the present invention includes a plurality of drive circuits for driving the terminals of the capacitive element, each of the drive circuits comprises an output terminal connected to a terminal of the capacitive element;
a first switching element having a first current te
Maruyama Tadashi
Nitta Noboru
Ono Shunichi
Takamura Jun
Frishauf Holtz Goodman & Chick P.C.
Leja Ronald W.
Toshiba Tec Kabushiki Kaisha
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