Capacitive circuit board testing system and method using a condu

Electricity: measuring and testing – Plural – automatically sequential tests

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324 51, 324158F, G01R 3102

Patent

active

045830428

ABSTRACT:
A capacitance measuring circuit board test system (10, 10') for measuring the electrical continuity and integrity of line segments (14) on a circuit board (12) including: a test stand support (20); a conductive pliant circuit board backside reference plane (19, 29, 34) carried by the support (20); means for pressing the circuit board (12) into intimate mutually coextensive face-to-face contact with the conductive pliant material (29) defining the reference plane (19, 29, 34) with the interface therebetween being devoid of air gaps; and, a capacitance measuring device (16, 40) having sensory terminals (5, 18 and 44, 45) respectively coupled to a relatively movable test probe (11, 46) and to the backside reference plane (19, 29, 34) for measuring the capacitance of the circuit board line segments (14) between n test points and the backside reference plane (19, 29, 34). The systems disclosed include methods and apparatus suitable for use with a wide variety of circuit boards (12) including single- or double-sided circuit boards, single- or multi-layer circuit boards, and circuit boards with and/or without internal ground and/or power planes; and, with a wide variety of different types of capacitance measuring devices including, for example, three point capacitance meters (16) and four point capacitance meters (40), in the latter of which current is driven through the circuit board (12) and test system (10') from a high-potential drive terminal (41) to a low-potential drive terminal (42) associated with the meter (40) while the voltage levels at the high- and low-potential sensory terminals (44, 45) are measured with the voltage drop therebetween being indicative of line segment capacitance.

REFERENCES:
patent: 3975680 (1976-08-01), Webb
patent: 4012693 (1977-03-01), Sullivan
patent: 4017793 (1977-04-01), Haines
patent: 4056773 (1977-11-01), Sullivan
patent: 4164704 (1979-08-01), Kato et al.
patent: 4229693 (1980-10-01), Irick et al.
Suzuki et al., Development of Automated Testing Device for Multi-Layer Ceramic Substrate International Microelectronics Conf. Tokyo May 24-26, 1982, pp. 197-190.
Wedwick, Robert W., Continuity Testing by Capacitance, Circuits Manufacture, Nov. 1974, pp. 60, 61.

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