Capacitance-to-voltage interface circuit with shared...

Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Lumped type parameters

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C341S161000, C341S172000, C327S094000, C324S678000

Reexamination Certificate

active

07969167

ABSTRACT:
A capacitance-to-voltage interface circuit includes a capacitive sensing circuit, an amplification circuit adapted for selective coupling to the capacitive sensing circuit, a capacitor bank comprising a plurality of binary-weighted capacitors, and a switching architecture associated with the capacitive sensing circuit, the amplification circuit, and the capacitor bank. The switching architecture reconfigures the capacitance-to-voltage interface circuit for operation in a plurality of different phases, including an amplification phase and an analog-to-digital conversion phase. During the amplification phase, the capacitor bank is utilized for offsetting capacitance of the amplification circuit. During the analog-to-digital conversion phase, the capacitor bank is utilized in a successive approximation register.

REFERENCES:
patent: 4195282 (1980-03-01), Cameron
patent: 4803462 (1989-02-01), Hester et al.
patent: 5889486 (1999-03-01), Opris et al.
patent: 5977803 (1999-11-01), Tsugai
patent: 6316948 (2001-11-01), Briefer
patent: 6316958 (2001-11-01), Jenkins, IV
patent: 6522277 (2003-02-01), Fujimori et al.
patent: 6529015 (2003-03-01), Nonoyama et al.
patent: 7015852 (2006-03-01), Atris et al.
patent: 7023372 (2006-04-01), Singh et al.
patent: 7235983 (2007-06-01), O'Dowd et al.
patent: 7265706 (2007-09-01), Boemler
patent: 7271758 (2007-09-01), Piasecki et al.
patent: 7282929 (2007-10-01), Atris et al.
patent: 7289502 (2007-10-01), Gemelli et al.
patent: 7304483 (2007-12-01), O'Dowd et al.
patent: 7411538 (2008-08-01), Piasecki
patent: 7595648 (2009-09-01), Ungaretti et al.
patent: 2002/0148291 (2002-10-01), Nagahara et al.
patent: 2003/0234736 (2003-12-01), Tachibana et al.
patent: 2005/0140537 (2005-06-01), Waltari
patent: 2006/0068749 (2006-03-01), Ismail et al.
patent: 2006/0114074 (2006-06-01), Matsui et al.
patent: 2006/0273804 (2006-12-01), Delorme et al.
patent: 2008/0211706 (2008-09-01), Sutardja
patent: 2010/0001892 (2010-01-01), Aruga et al.
patent: 4119244 (1992-12-01), None
patent: 11-023609 (1999-01-01), None
Lotters, J., et al., A sensitive differential capacitance to voltage converter for sensor applications, Instrumentation and Measurement, IEEE Transactions on vol. 48, Issue 1, Feb. 1999 pp., 89-96.
Craninckx, J.,et al., A 65fJ/Conversion-Step 0-to-50MS/s 0-to-0.7mW 9b Charge-Sharing SAR ADC in 90nm Digital CMOS, ISSCC 2007, Session 13, Feb. 2007, pp. 246-247; 600.
Agnes, A, et al., A 9.4ENOB 1V 3.8 uW 100sK/s SAR ADC with time domain comparator, IEEE International Solid State Circuits Conference, pp. 246-247, 2008.
Notice of Allowance mailed Jun. 1, 2010 on U.S. Appl. No. 12/360,933.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Capacitance-to-voltage interface circuit with shared... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Capacitance-to-voltage interface circuit with shared..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Capacitance-to-voltage interface circuit with shared... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2706728

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.