Static information storage and retrieval – Interconnection arrangements
Patent
1997-10-30
2000-01-04
Nguyen, Tan T.
Static information storage and retrieval
Interconnection arrangements
36523003, G11C 506
Patent
active
060117109
ABSTRACT:
A memory system for minimizing the capacitive load of the memory data bus. The invention provides a digital memory system including a controller, a data bus in electrical communication with the controller, and memory devices. The controller operates to selectively couple one of the memory devices to the data bus when accessing a memory location in that memory device and to decouple that memory device from the data bus at other times. This selective coupling of the memory devices minimizes capacitive loading of the data bus. A method according to the includes establishing an electrical connection between one of the memory devices and the external circuit in response to a request from the external circuit to access a memory location in the memory device. Next, the requested access to the memory location is provided. Then the electrical connection between the memory device and the external circuit is broken after the access has been completed, thereby reducing capacitive loading of the external circuit.
REFERENCES:
patent: 5719817 (1998-02-01), Schaefer
patent: 5781495 (1998-07-01), Arimoto
patent: 5802395 (1998-09-01), Connolly et al.
patent: 5862076 (1999-01-01), Eitan
Hewlett--Packard Company
Nguyen Tan T.
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