Capacitance measurement using an RLC circuit model

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36457101, 364481, 324600, 324601, 324638, G01R 2700

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active

057936404

ABSTRACT:
A computer-aided method and system are provided for obtaining a measurement of the capacitance value of a device under test (DUT). The complex impedance of a device under test (DUT) is measured at two nearby frequencies using an RLC meter. The two complex impedance values are then stored in a computer readable medium. The DUT is modeled by a programmed computer as a four element RLC model circuit including a resistor and inductor in series with a parallel RC circuit having a single capacitor which represents the capacitance of the DUT. Four equations which describe the electrical characteristics of the four element RLC model circuit are stored in a computer readable medium. The four measured values of complex impedance are substituted by the computer into the four stored equations. Values are obtained for the four individual RLC circuit elements by solving the four equations. The four unknown values are obtained by use of an optimization routine and then stored to a computer readable medium. The value capacitor element representing the capacitance of the DUT is then displayed.

REFERENCES:
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patent: 5216373 (1993-06-01), Wakamatsu et al.
patent: 5463323 (1995-10-01), Wakamatsu
patent: 5532590 (1996-07-01), Yamanaka
patent: 5633801 (1997-05-01), Bottman
Baumann, A.; "Measuring device input impedance on Teradyne A500 series test system"; Texas Instruments Technical Journal; pp. 95-105, 1996.

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