Capacitance magnification circuit

Details Capacitance magnification circuit Capacitance magnification circuit

1976-06-16

1977-05-24

Miller, Jr., Stanley D.

Amplifiers

Signal feedback

Combined with control of bias voltage of signal amplifier

328128, 328142, 330109, 330110, G06G 718, H03K 500, H03F 136

Patent

active

040258670

ABSTRACT:
A capacitance magnification circuit comprising an amplifier having a positive gain G, a first capacitor having a value C1, and a second capacitor having a value C2. The first capacitor is connected between the input port of the amplifier and an input port of the circuit, the second capacitor is connected between the input and output ports of the amplifier, and the output port of the amplifier is connected to an output port of the circuit. An effective capacitance value C1.sup.2 /.delta. is realized when the condition (G-1)C2-C1=.delta. is satisfied, where .delta. is an arbitrarily small positive value.

REFERENCES:
patent: 3047808 (1962-07-01), Gray
patent: 3094675 (1963-06-01), Ule
patent: 3333117 (1967-07-01), Carter
patent: 3643173 (1972-02-01), Whitten
patent: 3831117 (1974-08-01), Fletcher et al.
"Handbook of Modern Solid State Amplifiers," by Lenk, 1974, p. 342.

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