Cancellation of slope compensation effect on current limit

Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...

Reexamination Certificate

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C363S021170

Reexamination Certificate

active

06611131

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to switching regulator circuits. More particularly, the present invention relates to circuits and methods for offsetting the current reduction effects caused by the use of slope compensation in switching regulator circuits.
The purpose of a voltage regulator is to provide a predetermined and substantially constant output voltage to a load from a voltage source which may be poorly-specified or fluctuating. Two types of regulators are commonly used to provide this function, a linear regulator and a switching regulator. In a typical linear regulator, the output voltage is regulated by controlling the flow of current through a pass element from the voltage source to the load.
In switching voltage regulators, however, the flow of current from the voltage source to the load is not steady, but is rather in the form of discrete current pulses. To create the discrete current pulses, switching regulators usually employ a switch (such as a power transistor) that is coupled either in series or parallel with the load. The current pulses are then converted into a steady load current with an inductive storage element.
By controlling the duty cycle of this switch (i.e., the percentage of time that the switch is ON relative to the total period of the switching cycle), the switching voltage regulator can regulate the load voltage. In current-mode switching voltage regulators (i.e., a switching regulator that is controlled by a current-derived signal in the regulator) there is an inherent instability when the duty cycle exceeds 50% (i.e., when the switch is ON for more than 50% of a given switching period). Stability is often maintained in such current-mode switching regulators by adjusting the current-derived signal used to control the regulator with a slope compensation signal.
One method of producing such a slope compensation signal is to use a portion of an oscillator signal as the compensation signal. The oscillator signal may be, for example, a ramp signal that is used to generate a clock signal that controls the switching of the regulator. The slope compensation signal can be applied by either adding the ramp signal to the current-derived signal, or by subtracting it from a control signal.
An example of a typical prior art current-mode switching regulator
100
utilizing slope compensation is shown in FIG.
1
. Such a switching regulator is available from Linear Technology Corporation, Milpitas, Calif., for example, in model LT1376. Voltage regulator
100
generally comprises an output circuit
110
and a control circuit
130
.
The voltage regulator of
FIG. 1
operates as follows. A switch timing circuit
112
(which may be any circuit suitable for producing substantially in-phase ramp and clock signals) within control circuit
130
supplies a control signal SW ON that sets a latch
114
. While latch
114
is set, it provides a signal to output circuit
110
that causes a switch
108
to turn ON and provide current from an input voltage source V
IN
to an output node
109
. Latch
114
remains set until an output signal from a current comparator
122
causes latch
114
to reset. When reset, latch
114
turns switch
108
OFF so that current is no longer drawn from V
IN
. Current comparator
122
determines when to reset latch
114
by comparing a signal (I
L
) that is indicative of the current supplied to output circuit
110
with a current threshold value (I
TH
) generated by an error amplifier
124
and a slope compensation signal I
SC
(discussed in more detail below).
The primary purpose of output circuit
110
is to provide current pulses as directed by control circuit
130
and to convert those current pulses into a substantially constant output current. Output circuit
110
includes power switch
108
coupled to V
IN
(through sensing a resistor
132
) and a node
107
, a catch diode
102
coupled from node
107
to ground, an inductor
104
coupled from node
107
to output node
109
, and a capacitor
106
coupled from output node
109
to ground. Although switching element
108
is depicted as a bipolar junction transistor (BJT) in
FIGS. 1 and 3
, any other suitable switching element may be used if desired.
The operation of output circuit
110
can be divided into two periods. The first is when power switch
108
is ON, and the second is when power switch
108
is OFF. During the ON period, current passes from V
IN
through switch
108
and flows through inductor
104
to output node
109
. During this period, catch diode
102
is reverse-biased. After power switch
108
turns OFF, however, inductor
104
still has current flowing through it. The former current path from V
IN
through switch
108
is now open-circuited, causing the voltage at node
107
to drop such that catch diode
102
becomes forward-biased and starts to conduct. This maintains a closed current loop through the load. When power switch
108
turns ON again, the voltage at node
107
rises such that catch diode
102
becomes reverse-biased and again turns OFF.
As shown in
FIG. 1
, error amplifier
124
senses the output voltage of regulator
100
via a feedback signal V
FB
. Error amplifier
124
, which is preferably a transconductance amplifier, compares V
FB
with a reference voltage
116
(V
REF
) that is also connected to amplifier
124
. A control signal, V
C
, is generated in response to this comparison. The V
C
control signal is filtered by a capacitor
127
and coupled to the emitter of PNP transistor
118
and the base of NPN transistor
126
. The V
C
signal controls transistor
126
. When the value of V
C
is large enough to turn transistor
126
ON, a current “I
TH
” flows through resistor
128
. Generally speaking, the value of I
TH
is dependent on V
C
. As V
C
increases, so does I
TH
and vice versa.
The value of I
TH
establishes the threshold point at which current comparator
122
trips. Therefore, as I
TH
increases, the current threshold of switch
108
also increases to maintain a substantially constant output voltage. However, as mentioned above, current-mode voltage regulators can become unstable when the duty cycle exceeds 50%. To prevent this instability, a duty cycle proportional slope compensation signal may be subtracted from the feedback signal (I
TH
) to increase the rate of current rise perceived by control circuit
130
. This is accomplished in
FIG. 1
by applying the ramp signal from switch timing circuit
112
to a node between the emitter of transistor
126
and a resistor
125
(through a circuit generally depicted as variable current source
113
). As the ramp signal progresses toward its peak, the voltage at the emitter of transistor
126
rises, impeding the flow of current, which causes the I
TH
to decrease. Current comparator
122
interprets this as an increase in the rate of current rise in inductor
104
. This causes the perceived rate of current rise in inductor
104
to be greater than the rate of current fall, which allows regulator
100
to operate at duty cycles greater than 50% without becoming unstable.
To prevent damage to switch
108
, the maximum operating current of regulator
100
is limited to a certain level by placing a voltage clamp on the V
C
signal. Such a voltage clamp is typically implemented as shown in
FIG. 1
using a PNP transistor
118
and a fixed voltage source
120
. As long as the value of V
C
remains within a permissible operating range, voltage source
120
keeps the emitter-base junction of transistor
118
reverse-biased so that it acts as an open circuit. However, when V
C
attempts to rise above a preset maximum value, transistor
118
turns ON and starts to conduct. This diverts excess current away from the V
C
signal so that its voltage always remains at or below the preset maximum.
One undesirable consequence of slope compensation is that the true maximum current that can pass through switch
108
decreases proportionally as the duty cycle increases. This is because as the duty cycle increases, the effective magnitude of the slope compensation signal (I
SC
) al

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