Camera with memory address designation feature

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Details

35428912, 354217, 354213, 36496576, 3649656, 3649657, 364DIG2, G06F 1206, G03B 1700

Patent

active

055028306

ABSTRACT:
A memory device having a plurality of regions is provided with a designating circuit for performing data erasing and writing in a given memory region. A change circuit changes the memory region either after a predetermined number of erasing/writing cycles or in response to the number of times an operation member effects a detected state.

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