1989-02-15
1990-04-10
Perkey, W. B.
354484, 354486, 3541731, 354214, G03B 100, G03B 1700
Patent
active
049164740
ABSTRACT:
A camera having a CPU reset function. The CPU has an on state in which a reference clock is supplied to maintain the CPU in an oscillating state, and an off state in which the oscillation is stopped. When the on and off states are changed over by an external switch, a reset signal is generated to reset the CPU. Even if the CPU makes a runaway which cannot be noticed form the outside, the CPU is necessarily reset in response to the changeover operation of the external switch.
REFERENCES:
patent: 4103307 (1978-07-01), Shinoda et al.
patent: 4281917 (1981-08-01), Kitagawa et al.
Inoue Akira
Kimura Akiteru
Maruyama Atsushi
Miyazawa Azuma
Watanabe Akira
Olympus Optical Co,. Ltd.
Perkey W. B.
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