CAM circuit and output method thereof

Static information storage and retrieval – Associative memories – Ferroelectric cell

Reexamination Certificate

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Details

C365S195000

Reexamination Certificate

active

10577720

ABSTRACT:
A CAM circuit according to the present invention used for a cash memory and the like, wherein an address is obtained by designating a data, comprises a data compare unit for comparing a data stored in a memory unit to a data of a compare line in a state where a match line is activated and a consistency cancel circuit for forcibly making the match line inactive when a word line and a write instruction signal are both activated. When a write operation and a retrieve operation are simultaneously instructed, a result of the retrieval is forcibly judged to be inconsistent at a write address, thereby it is unnecessary to prohibit the simultaneous execution of the write operation and the retrieve operation.

REFERENCES:
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patent: 5828593 (1998-10-01), Schultz et al.
patent: 6389524 (2002-05-01), Sato
patent: 6859377 (2005-02-01), Yamagata
patent: 2003/0081442 (2003-05-01), Tsuda et al.
patent: 4-85795 (1992-03-01), None
patent: 9-198878 (1997-07-01), None
patent: 2000-30469 (2000-01-01), None
patent: 2001-184870 (2001-07-01), None
patent: 2003-141879 (2003-05-01), None

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