Multiplex communications – Wide area network – Packet switching
Patent
1980-03-25
1981-12-22
Britton, Howard
Multiplex communications
Wide area network
Packet switching
179 18ES, 364514, 370104, H04M 300, H04Q 1104, H04J 302, G06F 304
Patent
active
043074618
ABSTRACT:
A call processor is disclosed for a satellite communications controller, having a plurality of M voice ports, with an E lead input and an M lead output connected to each of a first subplurality of voice ports for rotary dial telephones, a tone digit interface connected to each of a second subplurality of voice ports which are dedicated to transducing a tone digit received from a multifrequency dialing telephone which is connected to one of a third plurality of voice ports. The third voice ports are connected by means of an intranodal wrap through a digital switch in the communications controller with the transducing circuits at the second voice ports so that the transducing circuitry can be shared among all of the third plurality of voice ports connected to multifrequency dialing telephones. The call processor employs a substantial amount of processing logic in the form of clocked control logic which is executed in a nested time slice operation. The call processor includes a timing circuit having a first output for generating N periodic logic intervals in M periodic port scanning intervals generated at a second output thereof. The call processor includes a port status buffer having an address input connected to the second output of the timer, for storing a plurality of M-PSB words. Each PSB word stores the current status of a corresponding one of the M voice ports as a control state, the E&M lead states, processor communication status, state time duration, and a dialing digit. The clocked control logic has an input register connected to a data output of the port status buffer for receiving the PSB words as they are accessed sequentially from locations in the port status buffer. The clocked control logic has a modulo N counter connected to the first output of the timer, for sequencing clocked logiccontrol operations having combinatorial logic block inputs connected to the input register and the modulo N counter. The clocked logic control operations are executed in response to the counter, to selectively modify portions of the PSB word. The selectively modified PSB word is then rewritten into the port status buffer at the location accessed by the second output of the timer. Incrementing and decrementing logic operating synchronously with the counter, selectively modifies the state time duration field and dialing digit field in response to the clocked logic control operations. After control states embodied in the clocked control logic have completed their function, the results of the operation are transmitted to the host processor to complete the call connection operations in the satellite communications controller. The use of clocked control logic which is shared on a nested, time slice basis among all of the M voice ports enables the call processor to handle a large number of calls simultaneously while relieving the host processor of the management tasks associated with carrying out these call processing functions.
REFERENCES:
patent: 4032721 (1977-06-01), Anizan
patent: 4119803 (1978-10-01), Jacob
patent: 4156796 (1979-05-01), O'Neal
patent: 4256926 (1981-03-01), Pitroda
Brickman Norman F.
Crosthwait William R.
Britton Howard
Hoel John E.
IBM Corporation
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