Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – With rotor
Reexamination Certificate
2000-01-28
2001-12-11
Metjahic, Safet (Department: 2858)
Electricity: measuring and testing
Measuring, testing, or sensing electricity, per se
With rotor
Reexamination Certificate
active
06329811
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a calibration unit for a semiconductor integrated circuit tester.
A conventional semiconductor integrated circuit tester includes a test head having multiple terminals for engaging respective terminals of a device under test (DUT) for carrying out test activities at the terminals of the DUT. The terminals of the test head are distributed over a DUT interface of the test head. The test head is conventionally carried by a manipulator which allows the test head to be positioned in several different orientations, including the so-called DUT down orientation in which the DUT interface is directed downwards, for engaging a DUT from above.
U.S. Pat. No. 4,724,378 discloses a calibration unit for a semiconductor integrated circuit tester. A practical implementation of the calibration unit shown in U.S. Pat. No. 4,724,378 includes a wheeled trolley or cart having a frame and an XYZ table mounted to the frame in a manner allowing movement of the table relative to the frame along horizontal (X and Y) and vertical (Z) axes. The test head of the tester that is to be calibrated is positioned over the calibration unit in the DUT down orientation and is docked to the calibration unit. The XYZ table executes a sequence of movements relative to the frame of the trolley to engage sequentially each terminal of the test head. While the XYZ table is in engagement with a given terminal, the calibration unit and the tester execute a calibration operation.
The practical implementation of the known calibration unit can only operate with a tester whose test head can be positioned in the DUT down orientation. This is not a severe disadvantage with a tester having a manipulator that provides a full range of movement of the test head. However, it has been proposed that semiconductor integrated circuit testers should be designed so that the test head has a limited range of movement and cannot be positioned in the DUT down orientation, even though it can be positioned in the DUT up orientation, in which the DUT interface is directed downwards. The conventional calibration unit cannot be used to calibrate such testers.
SUMMARY OF THE INVENTION
In accordance with a first aspect of the invention there is provided a calibration unit for a semiconductor integrated circuit tester comprising a frame, a manipulator arm having a proximal end at which it is attached to the frame and extends in cantilever fashion from the frame, the manipulator arm also having a distal end, and a calibration head attached to the manipulator arm at the distal end thereof and having a downwardly directed test interface for mating with a test head in DUT up orientation.
In accordance with a second aspect of the invention there is provided a semiconductor integrated circuit tester including a frame, a manipulator arm having a proximal end at which it is attached to the frame and extends in cantilever fashion from the frame, the manipulator arm also having a distal end, and a test head attached to the manipulator arm at the distal end thereof and having a downwardly directed test interface, and wherein the manipulator arm includes a parallelogram linkage allowing vertical movement of the test head relative to the frame.
REFERENCES:
patent: 6106511 (2000-08-01), Jensen
patent: 6124723 (2000-09-01), Costello
Credence Systems Corporation
LeRoux Etienne
Metjahic Safet
Smith-Hill John
Smith-Hill and Bedell
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